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From: "Nuno Sá" <noname.nuno@gmail.com>
To: David Lechner <dlechner@baylibre.com>,
	Angelo Dureghello <adureghello@baylibre.com>
Cc: "Nuno Sá" <nuno.sa@analog.com>,
	"Lars-Peter Clausen" <lars@metafoo.de>,
	"Michael Hennerich" <Michael.Hennerich@analog.com>,
	"Jonathan Cameron" <jic23@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Olivier Moysan" <olivier.moysan@foss.st.com>,
	linux-iio@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, "Mark Brown" <broonie@kernel.org>
Subject: Re: [PATCH v6 2/8] dt-bindings: iio: dac: adi-axi-dac: add ad3552r axi variant
Date: Tue, 15 Oct 2024 16:51:04 +0200	[thread overview]
Message-ID: <35d247418b8bd43695644f395901b117a1014109.camel@gmail.com> (raw)
In-Reply-To: <776ed45e-7ca8-42e8-9050-86928f223965@baylibre.com>

On Tue, 2024-10-15 at 09:40 -0500, David Lechner wrote:
> On 10/15/24 2:44 AM, Angelo Dureghello wrote:
> > On 14.10.2024 16:13, David Lechner wrote:
> > > On 10/14/24 5:08 AM, Angelo Dureghello wrote:
> > > > From: Angelo Dureghello <adureghello@baylibre.com>
> > > > 
> > > > Add a new compatible and related bindigns for the fpga-based
> > > > "ad3552r" AXI IP core, a variant of the generic AXI DAC IP.
> > > > 
> > > > The AXI "ad3552r" IP is a very similar HDL (fpga) variant of the
> > > > generic AXI "DAC" IP, intended to control ad3552r and similar chips,
> > > > mainly to reach high speed transfer rates using a QSPI DDR
> > > > (dobule-data-rate) interface.
> > > > 
> > > > The ad3552r device is defined as a child of the AXI DAC, that in
> > > > this case is acting as an SPI controller.
> > > > 
> > > > Note, #io-backend is present because it is possible (in theory anyway)
> > > > to use a separate controller for the control path than that used
> > > > for the datapath.
> > > > 
> > > > Signed-off-by: Angelo Dureghello <adureghello@baylibre.com>
> > > > ---
> > > >  .../devicetree/bindings/iio/dac/adi,axi-dac.yaml   | 56
> > > > ++++++++++++++++++++--
> > > >  1 file changed, 53 insertions(+), 3 deletions(-)
> > > > 
> > > > diff --git a/Documentation/devicetree/bindings/iio/dac/adi,axi-dac.yaml
> > > > b/Documentation/devicetree/bindings/iio/dac/adi,axi-dac.yaml
> > > > index a55e9bfc66d7..2b7e16717219 100644
> > > > --- a/Documentation/devicetree/bindings/iio/dac/adi,axi-dac.yaml
> > > > +++ b/Documentation/devicetree/bindings/iio/dac/adi,axi-dac.yaml
> > > > @@ -19,11 +19,13 @@ description: |
> > > >    memory via DMA into the DAC.
> > > >  
> > > >    https://wiki.analog.com/resources/fpga/docs/axi_dac_ip
> > > > +  https://analogdevicesinc.github.io/hdl/library/axi_ad3552r/index.html
> > > >  
> > > >  properties:
> > > >    compatible:
> > > >      enum:
> > > >        - adi,axi-dac-9.1.b
> > > > +      - adi,axi-ad3552r
> > > >  
> > > >    reg:
> > > >      maxItems: 1
> > > > @@ -36,7 +38,14 @@ properties:
> > > >        - const: tx
> > > >  
> > > >    clocks:
> > > > -    maxItems: 1
> > > > +    minItems: 1
> > > > +    maxItems: 2
> > > > +
> > > > +  clock-names:
> > > > +    minItems: 1
> > > > +    items:
> > > > +      - const: s_axi_aclk
> > > > +      - const: dac_clk
> > > >  
> > > >    '#io-backend-cells':
> > > >      const: 0
> > > > @@ -47,7 +56,16 @@ required:
> > > >    - reg
> > > >    - clocks
> > > >  
> > > > -additionalProperties: false
> > > > +allOf:
> > > > +  - if:
> > > > +      properties:
> > > > +        compatible:
> > > > +          contains:
> > > > +            const: adi,axi-ad3552r
> > > > +    then:
> > > > +      $ref: /schemas/spi/spi-controller.yaml#
> > >   +      properties:
> > >   +        clocks:
> > >   +          minItems: 2
> > >   +        clock-names:
> > >   +          minItems: 2
> > >   +      required:
> > >   +        clock-names
> > >   +    else:
> > >   +      properties:
> > >   +        clocks:
> > >   +          maxItems: 1
> > >   +        clock-names:
> > >   +          maxItems: 1
> > > 
> > > We could make the checking of clocks more strict to show
> > > the intent:
> > > 
> > > adi,axi-dac-9.1.b only has 1 clock and clock-names is optional.
> > > 
> > > adi,axi-ad3552r always has 2 clocks and clock-names is required.
> > > 
> > is this really necessary ? At v.6 would not fix things
> > not reallyh necessary.
> >  
> It is just a suggestion from me. I will leave it to the maintainers
> to say if it is necessary or not. (If they don't say anything, then
> we'll take it to mean it isn't necessary.)
> 

Not a DT maintainer but IMHO, having these kind of checks in the bindings is very
useful.

- Nuno Sá

  reply	other threads:[~2024-10-15 14:51 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-14 10:08 [PATCH v6 0/8] iio: add support for the ad3552r AXI DAC IP Angelo Dureghello
2024-10-14 10:08 ` [PATCH v6 1/8] dt-bindings: iio: dac: ad3552r: add iio backend support Angelo Dureghello
2024-10-14 10:08 ` [PATCH v6 2/8] dt-bindings: iio: dac: adi-axi-dac: add ad3552r axi variant Angelo Dureghello
2024-10-14 11:21   ` Rob Herring (Arm)
2024-10-14 13:38     ` Rob Herring
2024-10-14 14:04       ` Angelo Dureghello
2024-10-14 19:20         ` Jonathan Cameron
2024-10-14 19:24           ` Angelo Dureghello
2024-10-14 21:13   ` David Lechner
2024-10-15  7:44     ` Angelo Dureghello
2024-10-15 14:40       ` David Lechner
2024-10-15 14:51         ` Nuno Sá [this message]
2024-10-15 18:19           ` Angelo Dureghello
2024-10-14 10:08 ` [PATCH v6 3/8] iio: backend: extend features Angelo Dureghello
2024-10-14 10:08 ` [PATCH v6 4/8] iio: dac: adi-axi-dac: " Angelo Dureghello
2024-10-14 21:14   ` David Lechner
2024-10-15  6:30     ` Nuno Sá
2024-10-15  8:57     ` Angelo Dureghello
2024-10-15 11:10       ` Nuno Sá
2024-10-19 15:08         ` Jonathan Cameron
2024-10-14 10:08 ` [PATCH v6 5/8] iio: dac: ad3552r: changes to use FIELD_PREP Angelo Dureghello
2024-10-14 21:14   ` David Lechner
2024-10-15  6:17     ` Nuno Sá
2024-10-15 10:19     ` Angelo Dureghello
2024-10-14 10:08 ` [PATCH v6 6/8] iio: dac: ad3552r: extract common code (no changes in behavior intended) Angelo Dureghello
2024-10-19 15:15   ` Jonathan Cameron
2024-10-14 10:08 ` [PATCH v6 7/8] iio: dac: ad3552r: add high-speed platform driver Angelo Dureghello
2024-10-14 21:15   ` David Lechner
2024-10-15  6:37     ` Nuno Sá
2024-10-15 14:38       ` David Lechner
2024-10-15 15:00         ` Nuno Sá
2024-10-15 15:23           ` David Lechner
2024-10-16  7:50             ` Nuno Sá
2024-10-19 15:18               ` Jonathan Cameron
2024-10-16  8:35           ` Angelo Dureghello
2024-10-15  7:15   ` Nuno Sá
2024-10-15 14:48     ` David Lechner
2024-10-16 11:54       ` Nuno Sá
2024-10-17  7:27     ` Angelo Dureghello
2024-10-19 15:24   ` Jonathan Cameron
2024-10-14 10:08 ` [PATCH v6 8/8] iio: dac: adi-axi-dac: add registering of child fdt node Angelo Dureghello
2024-10-14 21:16   ` David Lechner
2024-10-15  6:11     ` Nuno Sá
2024-10-17  8:32       ` Angelo Dureghello
2024-10-17 15:13         ` Nuno Sá

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