From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
To: horms@verge.net.au, linux-renesas-soc@vger.kernel.org,
robh+dt@kernel.org, mark.rutland@arm.com,
devicetree@vger.kernel.org
Cc: magnus.damm@gmail.com, linux@arm.linux.org.uk,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 2/3] ARM: dts: blanche: add SCIF0/3 pins
Date: Mon, 04 Jul 2016 23:54:04 +0300 [thread overview]
Message-ID: <3636132.pRUtqSxpmQ@wasted.cogentembedded.com> (raw)
In-Reply-To: <2793535.9X0Tq7I1Mq@wasted.cogentembedded.com>
Add the (previously omitted) SCIF0/3 pin data to the Blanche board's
device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
Changes in version 2:
- added Geert's tag.
arch/arm/boot/dts/r8a7792-blanche.dts | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
Index: renesas/arch/arm/boot/dts/r8a7792-blanche.dts
===================================================================
--- renesas.orig/arch/arm/boot/dts/r8a7792-blanche.dts
+++ renesas/arch/arm/boot/dts/r8a7792-blanche.dts
@@ -57,10 +57,28 @@
clock-frequency = <20000000>;
};
+&pfc {
+ scif0_pins: scif0 {
+ groups = "scif0_data";
+ function = "scif0";
+ };
+
+ scif3_pins: scif3 {
+ groups = "scif3_data";
+ function = "scif3";
+ };
+};
+
&scif0 {
+ pinctrl-0 = <&scif0_pins>;
+ pinctrl-names = "default";
+
status = "okay";
};
&scif3 {
+ pinctrl-0 = <&scif3_pins>;
+ pinctrl-names = "default";
+
status = "okay";
};
next prev parent reply other threads:[~2016-07-04 20:54 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-04 20:51 [PATCH v2 0/3] Add R8A7792/Blanche PFC support Sergei Shtylyov
2016-07-04 20:52 ` [PATCH v2 1/3] ARM: dts: r8a7792: add " Sergei Shtylyov
2016-07-04 20:54 ` Sergei Shtylyov [this message]
2016-07-04 20:55 ` [PATCH v2 3/3] ARM: dts: blanche: add Ethernet pins Sergei Shtylyov
2016-07-05 7:29 ` Geert Uytterhoeven
2016-07-05 13:43 ` Sergei Shtylyov
2016-07-06 19:12 ` Sergei Shtylyov
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