[PATCH v2 0/3] Add R8A7792/Blanche PFC support

[PATCH v2 0/3] Add R8A7792/Blanche PFC support

[Sergei Shtylyov]

Hello.

   Here's the set of 3 patches against Simon Horman's 'renesas.git' repo,
'renesas-devel-20160704-v4.7-rc6' tag. We're adding the R8A7792 PFC node and
then describe the pins for the SCIFs and SMSC LAN89218 Ethernet chip found on
the Blanche board. These patches depend on the R8A7792 PFC driver patchset
in order to work properly.

[1/3] ARM: dts: r8a7792: add PFC support
[2/3] ARM: dts: blanche: add SCIF pins
[3/3] ARM: dts: blanche: add Ethernet pins

WBR, Sergei

[PATCH v2 1/3] ARM: dts: r8a7792: add PFC support

[Sergei Shtylyov]

Define the generic R8A7792 part of the PFC device node.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

---
Changes in version 2:
- killed extra empty line;
- added Geert's tag.

 arch/arm/boot/dts/r8a7792.dtsi |    5 +++++
 1 file changed, 5 insertions(+)

Index: renesas/arch/arm/boot/dts/r8a7792.dtsi
===================================================================
--- renesas.orig/arch/arm/boot/dts/r8a7792.dtsi
+++ renesas/arch/arm/boot/dts/r8a7792.dtsi
@@ -108,6 +108,11 @@
 			#power-domain-cells = <1>;
 		};
 
+		pfc: pin-controller@e6060000 {
+			compatible = "renesas,pfc-r8a7792";
+			reg = <0 0xe6060000 0 0x144>;
+		};
+
 		dmac0: dma-controller@e6700000 {
 			compatible = "renesas,dmac-r8a7792",
 				     "renesas,rcar-dmac";

[PATCH v2 2/3] ARM: dts: blanche: add SCIF0/3 pins

[Sergei Shtylyov]

Add the (previously omitted) SCIF0/3 pin data to the Blanche board's
device tree.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

---
Changes in version 2:
- added Geert's tag.

 arch/arm/boot/dts/r8a7792-blanche.dts |   18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

Index: renesas/arch/arm/boot/dts/r8a7792-blanche.dts
===================================================================
--- renesas.orig/arch/arm/boot/dts/r8a7792-blanche.dts
+++ renesas/arch/arm/boot/dts/r8a7792-blanche.dts
@@ -57,10 +57,28 @@
 	clock-frequency = <20000000>;
 };
 
+&pfc {
+	scif0_pins: scif0 {
+		groups = "scif0_data";
+		function = "scif0";
+	};
+
+	scif3_pins: scif3 {
+		groups = "scif3_data";
+		function = "scif3";
+	};
+};
+
 &scif0 {
+	pinctrl-0 = <&scif0_pins>;
+	pinctrl-names = "default";
+
 	status = "okay";
 };
 
 &scif3 {
+	pinctrl-0 = <&scif3_pins>;
+	pinctrl-names = "default";
+
 	status = "okay";
 };

[PATCH v2 3/3] ARM: dts: blanche: add Ethernet pins

[Sergei Shtylyov]

Add the (previously omitted) pin data for the SMSC LAN89218 Ethernet chip
to the Blanche board's device tree: the chip's IRQ output is connected to
the SoC's IRQ0 pin and its nCS input is connected to the SoC's EX_CS0# pin.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>

---
 arch/arm/boot/dts/r8a7792-blanche.dts |   15 +++++++++++++++
 1 file changed, 15 insertions(+)

Index: renesas/arch/arm/boot/dts/r8a7792-blanche.dts
===================================================================
--- renesas.orig/arch/arm/boot/dts/r8a7792-blanche.dts
+++ renesas/arch/arm/boot/dts/r8a7792-blanche.dts
@@ -50,6 +50,9 @@
 		reg-io-width = <4>;
 		vddvario-supply = <&d3_3v>;
 		vdd33a-supply = <&d3_3v>;
+
+		pinctrl-0 = <&lan89218_pins>;
+		pinctrl-names = "default";
 	};
 };
 
@@ -67,6 +70,18 @@
 		groups = "scif3_data";
 		function = "scif3";
 	};
+
+	lan89218_pins: lan89218 {
+		intc {
+			groups = "intc_irq0";
+			function = "intc";
+		};
+		lbsc {
+			groups = "lbsc_ex_cs0";
+			function = "lbsc";
+		};
+	};
+
 };
 
 &scif0 {

Re: [PATCH v2 3/3] ARM: dts: blanche: add Ethernet pins

[Geert Uytterhoeven]

Hi Sergei,

On Mon, Jul 4, 2016 at 10:55 PM, Sergei Shtylyov
<sergei.shtylyov@cogentembedded.com> wrote:
> Add the (previously omitted) pin data for the SMSC LAN89218 Ethernet chip
> to the Blanche board's device tree: the chip's IRQ output is connected to
> the SoC's IRQ0 pin and its nCS input is connected to the SoC's EX_CS0# pin.
>
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
>
> ---
>  arch/arm/boot/dts/r8a7792-blanche.dts |   15 +++++++++++++++
>  1 file changed, 15 insertions(+)
>
> Index: renesas/arch/arm/boot/dts/r8a7792-blanche.dts
> ===================================================================
> --- renesas.orig/arch/arm/boot/dts/r8a7792-blanche.dts
> +++ renesas/arch/arm/boot/dts/r8a7792-blanche.dts
> @@ -50,6 +50,9 @@
>                 reg-io-width = <4>;
>                 vddvario-supply = <&d3_3v>;
>                 vdd33a-supply = <&d3_3v>;
> +
> +               pinctrl-0 = <&lan89218_pins>;
> +               pinctrl-names = "default";
>         };
>  };
>
> @@ -67,6 +70,18 @@
>                 groups = "scif3_data";
>                 function = "scif3";
>         };
> +
> +       lan89218_pins: lan89218 {
> +               intc {
> +                       groups = "intc_irq0";
> +                       function = "intc";
> +               };
> +               lbsc {
> +                       groups = "lbsc_ex_cs0";
> +                       function = "lbsc";

Don't you need pinctrl for the other LBSC pins, like the address and data lines
(Ax and Dy)?

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH v2 3/3] ARM: dts: blanche: add Ethernet pins

[Sergei Shtylyov]

On 07/05/2016 10:29 AM, Geert Uytterhoeven wrote:

>> Add the (previously omitted) pin data for the SMSC LAN89218 Ethernet chip
>> to the Blanche board's device tree: the chip's IRQ output is connected to
>> the SoC's IRQ0 pin and its nCS input is connected to the SoC's EX_CS0# pin.
>>
>> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
>>
>> ---
>>  arch/arm/boot/dts/r8a7792-blanche.dts |   15 +++++++++++++++
>>  1 file changed, 15 insertions(+)
>>
>> Index: renesas/arch/arm/boot/dts/r8a7792-blanche.dts
>> ===================================================================
>> --- renesas.orig/arch/arm/boot/dts/r8a7792-blanche.dts
>> +++ renesas/arch/arm/boot/dts/r8a7792-blanche.dts
[...]
>> @@ -67,6 +70,18 @@
>>                 groups = "scif3_data";
>>                 function = "scif3";
>>         };
>> +
>> +       lan89218_pins: lan89218 {
>> +               intc {
>> +                       groups = "intc_irq0";
>> +                       function = "intc";
>> +               };
>> +               lbsc {
>> +                       groups = "lbsc_ex_cs0";
>> +                       function = "lbsc";
>
> Don't you need pinctrl for the other LBSC pins, like the address and data lines
> (Ax and Dy)?
>

    Unlike the chip selects, the address/data lines are not "monopolized" by a 
single device, so I'm not sure what to do with them...

> Gr{oetje,eeting}s,
>
>                         Geert

MBR, Sergei

Re: [PATCH v2 3/3] ARM: dts: blanche: add Ethernet pins

[Sergei Shtylyov]

On 07/04/2016 11:55 PM, Sergei Shtylyov wrote:

> Add the (previously omitted) pin data for the SMSC LAN89218 Ethernet chip
> to the Blanche board's device tree: the chip's IRQ output is connected to
> the SoC's IRQ0 pin and its nCS input is connected to the SoC's EX_CS0# pin.
>
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
>
> ---
>  arch/arm/boot/dts/r8a7792-blanche.dts |   15 +++++++++++++++
>  1 file changed, 15 insertions(+)
>
> Index: renesas/arch/arm/boot/dts/r8a7792-blanche.dts
> ===================================================================
> --- renesas.orig/arch/arm/boot/dts/r8a7792-blanche.dts
> +++ renesas/arch/arm/boot/dts/r8a7792-blanche.dts
[...]
> @@ -67,6 +70,18 @@
>  		groups = "scif3_data";
>  		function = "scif3";
>  	};
> +
> +	lan89218_pins: lan89218 {
> +		intc {
> +			groups = "intc_irq0";
> +			function = "intc";
> +		};
> +		lbsc {
> +			groups = "lbsc_ex_cs0";
> +			function = "lbsc";
> +		};
> +	};
> +

    Oops, stray newline... will fix!

>  };
>
>  &scif0 {

MBR, Sergei