From: Alexander Stein <alexander.stein@ew.tq-group.com>
To: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Cc: neil.armstrong@linaro.org, conor+dt@kernel.org, rfoss@kernel.org,
krzysztof.kozlowski+dt@linaro.org, jonas@kwiboo.se,
shawnguo@kernel.org, s.hauer@pengutronix.de,
jernej.skrabec@gmail.com, robh+dt@kernel.org,
Laurent.pinchart@ideasonboard.com, andrzej.hajda@intel.com,
kernel@pengutronix.de, linux-imx@nxp.com,
Liu Ying <victor.liu@nxp.com>
Subject: Re: [PATCH 0/9] drm/bridge: imx: Add i.MX93 MIPI DSI support
Date: Tue, 18 Jul 2023 09:39:36 +0200 [thread overview]
Message-ID: <3750806.kQq0lBPeGt@steina-w> (raw)
In-Reply-To: <20230717061831.1826878-1-victor.liu@nxp.com>
Hi,
Am Montag, 17. Juli 2023, 08:18:22 CEST schrieb Liu Ying:
> Hi,
>
> This series aims to add MIPI DSI support for Freescale i.MX93 SoC.
>
> There is a Synopsys DesignWare MIPI DSI host controller and a Synopsys
> Designware MIPI DPHY embedded in i.MX93. Some configurations and
> extensions to them are controlled by i.MX93 media blk-ctrl.
>
> Add a DRM bridge for i.MX93 MIPI DSI by using existing DW MIPI DSI
> bridge helpers and implementing i.MX93 MIPI DSI specific extensions.
>
> Note that since this series touches the dw-mipi-dsi driver, tests are
> needed to be done for meson, rockchip and stm.
>
> Patch 1 ~ 7 do preparation work for adding i.MX93 MIPI DSI DRM bridge
> driver.
>
> Patch 8 adds DT-binding documentation for i.MX93 MIPI DSI.
>
> Patch 9 adds i.MX93 MIPI DSI DRM bridge.
>
> Liu Ying (9):
> drm/bridge: synopsys: dw-mipi-dsi: Add dw_mipi_dsi_get_bridge() helper
> drm/bridge: synopsys: dw-mipi-dsi: Add input bus format negotiation
> support
> drm/bridge: synopsys: dw-mipi-dsi: Force input bus flags
> drm/bridge: synopsys: dw-mipi-dsi: Add mode fixup support
> drm/bridge: synopsys: dw-mipi-dsi: Use pixel clock rate to calculate
> lbcc
> drm/bridge: synopsys: dw-mipi-dsi: Set minimum lane byte clock cycles
> for HSA and HBP
> drm/bridge: synopsys: dw-mipi-dsi: Disable HSTX and LPRX timeout check
> dt-bindings: display: bridge: Document Freescale i.MX93 MIPI DSI
> drm/bridge: imx: Add i.MX93 MIPI DSI support
>
> .../display/bridge/fsl,imx93-mipi-dsi.yaml | 115 +++
> drivers/gpu/drm/bridge/imx/Kconfig | 10 +
> drivers/gpu/drm/bridge/imx/Makefile | 1 +
> drivers/gpu/drm/bridge/imx/imx93-mipi-dsi.c | 934 ++++++++++++++++++
> drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 91 +-
> include/drm/bridge/dw_mipi_dsi.h | 16 +
> 6 files changed, 1163 insertions(+), 4 deletions(-)
> create mode 100644
> Documentation/devicetree/bindings/display/bridge/fsl,imx93-mipi-dsi.yaml
> create mode 100644 drivers/gpu/drm/bridge/imx/imx93-mipi-dsi.c
Thanks for posting this patch series. I was trying to use this driver on our
TQMa93xxLA platform where the DSI signals are connected to a TC9595 (driver
tc358767) DSI-to-DP bridge.
Unfortunately this bridge requires the DSI signals to be in LP-11 upon reset
and while in idle, otherwise not even DP AUX channel is functional.
Apparently DSI is currently not in LP-11. But reading the RM I have no idea
how to configure the DSI host to achieve that. Do you have additional
information which might help me here?
Also could you provide your DT configuration?
Thanks and best regards,
Alexander
--
TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany
Amtsgericht München, HRB 105018
Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider
http://www.tq-group.com/
next prev parent reply other threads:[~2023-07-18 7:39 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-17 6:18 [PATCH 0/9] drm/bridge: imx: Add i.MX93 MIPI DSI support Liu Ying
2023-07-17 6:18 ` [PATCH 1/9] drm/bridge: synopsys: dw-mipi-dsi: Add dw_mipi_dsi_get_bridge() helper Liu Ying
2023-07-17 6:18 ` [PATCH 2/9] drm/bridge: synopsys: dw-mipi-dsi: Add input bus format negotiation support Liu Ying
2023-07-17 6:18 ` [PATCH 3/9] drm/bridge: synopsys: dw-mipi-dsi: Force input bus flags Liu Ying
2023-07-17 6:18 ` [PATCH 4/9] drm/bridge: synopsys: dw-mipi-dsi: Add mode fixup support Liu Ying
2023-07-17 6:18 ` [PATCH 5/9] drm/bridge: synopsys: dw-mipi-dsi: Use pixel clock rate to calculate lbcc Liu Ying
2023-08-01 9:42 ` neil.armstrong
2023-10-16 18:14 ` Heiko Stübner
2023-10-17 10:15 ` Ying Liu
2023-10-17 12:13 ` Heiko Stübner
2023-07-17 6:18 ` [PATCH 6/9] drm/bridge: synopsys: dw-mipi-dsi: Set minimum lane byte clock cycles for HSA and HBP Liu Ying
2023-08-01 9:42 ` neil.armstrong
2023-07-17 6:18 ` [PATCH 7/9] drm/bridge: synopsys: dw-mipi-dsi: Disable HSTX and LPRX timeout check Liu Ying
2023-08-01 9:42 ` neil.armstrong
2023-07-17 6:18 ` [PATCH 8/9] dt-bindings: display: bridge: Document Freescale i.MX93 MIPI DSI Liu Ying
2023-07-18 22:24 ` Rob Herring
2023-07-17 6:18 ` [PATCH 9/9] drm/bridge: imx: Add i.MX93 MIPI DSI support Liu Ying
2023-07-17 6:44 ` Jagan Teki
2023-07-18 2:58 ` Ying Liu
2023-07-18 9:34 ` Jagan Teki
2023-07-18 9:49 ` Ying Liu
2023-07-18 10:50 ` Jagan Teki
2023-07-19 8:35 ` Ying Liu
2023-07-30 18:38 ` Jagan Teki
2023-07-18 7:49 ` Alexander Stein
2023-07-18 9:00 ` Ying Liu
2023-07-18 9:31 ` Alexander Stein
2023-07-18 9:55 ` Ying Liu
2023-07-18 15:46 ` Sam Ravnborg
2023-07-19 8:37 ` Ying Liu
2023-07-19 1:10 ` kernel test robot
2023-07-18 7:39 ` Alexander Stein [this message]
2023-07-18 8:52 ` [PATCH 0/9] " Ying Liu
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