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From: "Heiko Stübner" <heiko@sntech.de>
To: Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Yao Zi <ziyao@disroot.org>
Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
	Celeste Liu <CoelacanthusHex@gmail.com>
Subject: Re: [PATCH 4/8] clk: rockchip: Add PLL flag ROCKCHIP_PLL_FIXED_MODE
Date: Wed, 02 Oct 2024 12:12:11 +0200	[thread overview]
Message-ID: <3798659.MHq7AAxBmi@diego> (raw)
In-Reply-To: <Zv0blIPaF0Y2Pmn1@pineapple>

Am Mittwoch, 2. Oktober 2024, 12:08:20 CEST schrieb Yao Zi:
> On Wed, Oct 02, 2024 at 10:16:49AM +0200, Heiko Stübner wrote:
> > Hi,
> > 
> > Am Dienstag, 1. Oktober 2024, 06:23:58 CEST schrieb Yao Zi:
> > > RK3528 comes with a new PLL type, flagged by ROCKCHIP_PLL_FIXED_MODE,
> > > which should operate in normal mode only. Add corresponding definition
> > > and handle it in code.
> > > 
> > 
> > More commit message would be nice ;-) .
> 
> Good idea.
> 
> > It's the PPLL for the pcie controller that is specified in the manual to
> > only work in normal mode. This is helpful for people reading along :-) .
> > 
> > Heiko
> 
> btw, for the documentation, is there any technical reference manual
> of RK3528 available publicly? Please let me know if it's true, it will
> be quite helpful to understand clock tree better :)

Sadly not. So far there hasn't been a "leak" yet and Rockchip also seems
to have gotten more restrictive for whatever strange reason, so with my
NDA I also only got part1 of the manual.


Heiko



  reply	other threads:[~2024-10-02 10:12 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-01  4:23 [PATCH 0/8] Support clock and reset unit of Rockchip RK3528 Yao Zi
2024-10-01  4:23 ` [PATCH 1/8] dt-bindings: clock: Add clock ID definition for " Yao Zi
2024-10-02  6:32   ` Krzysztof Kozlowski
2024-10-02  9:24     ` Yao Zi
2024-10-01  4:23 ` [PATCH 2/8] dt-bindings: reset: Add reset " Yao Zi
2024-10-01 16:29   ` Conor Dooley
2024-10-02  6:31   ` Krzysztof Kozlowski
2024-10-02  9:54     ` Yao Zi
2024-10-02 10:07       ` Heiko Stübner
2024-10-02 10:19         ` Yao Zi
2024-10-01  4:23 ` [PATCH 3/8] dt-bindings: clock: Add rockchip,rk3528-cru Yao Zi
2024-10-01 16:29   ` Conor Dooley
2024-10-01 21:18     ` Yao Zi
2024-10-02  8:49       ` Conor Dooley
2024-10-02 10:02         ` Yao Zi
2024-10-01  4:23 ` [PATCH 4/8] clk: rockchip: Add PLL flag ROCKCHIP_PLL_FIXED_MODE Yao Zi
2024-10-02  8:16   ` Heiko Stübner
2024-10-02 10:08     ` Yao Zi
2024-10-02 10:12       ` Heiko Stübner [this message]
2024-10-02 10:22         ` Yao Zi
2024-10-01  4:23 ` [PATCH 5/8] clk: rockchip: Add clock type GATE_NO_SET_RATE Yao Zi
2024-10-02  8:08   ` Heiko Stübner
2024-10-02 10:30     ` Yao Zi
2024-10-01  4:24 ` [PATCH 6/8] clk: rockchip: Add clock controller driver for RK3528 SoC Yao Zi
2024-10-02 10:21   ` Heiko Stübner
2024-10-02 10:38     ` Yao Zi
2024-10-01  4:38 ` [PATCH 7/8] arm64: dts: rockchip: Add clock generators " Yao Zi
2024-10-01  4:38 ` [PATCH 8/8] arm64: dts: rockchip: Add UART clocks " Yao Zi

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