devicetree.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: "Chuan Hua, Lei" <chuanhua.lei@linux.intel.com>
To: Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
	eswara.kota@linux.intel.com
Cc: cheol.yong.kim@intel.com, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, p.zabel@pengutronix.de,
	qi-ming.wu@intel.com, robh@kernel.org, hauke@hauke-m.de
Subject: Re: [PATCH v2 2/2] reset: Reset controller driver for Intel LGM SoC
Date: Mon, 26 Aug 2019 12:01:04 +0800	[thread overview]
Message-ID: <3813e658-1600-d878-61a4-29b4fe51b281@linux.intel.com> (raw)
In-Reply-To: <20190824211158.5900-1-martin.blumenstingl@googlemail.com>

Hi Martin,

Thanks for your comment.

On 8/25/2019 5:11 AM, Martin Blumenstingl wrote:
> Hi Dilip,
>
>> Add driver for the reset controller present on Intel
>> Lightening Mountain (LGM) SoC for performing reset
>> management of the devices present on the SoC. Driver also
>> registers a reset handler to peform the entire device reset.
> [...]
>> +static const struct of_device_id intel_reset_match[] = {
>> +	{ .compatible = "intel,rcu-lgm" },
>> +	{}
>> +};
> how is this IP block differnet from the one used in many Lantiq SoCs?
> there is already an upstream driver for the RCU IP block on the Lantiq
> SoCs: drivers/reset/reset-lantiq.c
>
> some background:
> Lantiq was started as a spinoff from Infineon in 2009. Intel then
> acquired Lantiq in 2015. source: [0]
> Intel is re-using some of the IP blocks from the MIPS Lantiq SoCs
> (Intel even has some own MIPS SoCs as part of the Lantiq acquisition,
> typically used for PON/GPON/ADSL/VDSL capable network devices).
> Thus I think it is likely that the new "Lightening Mountain" SoCs use
> an updated version of the Lantiq RCU IP.

I would not say there is a fundamental difference since reset is a 
really simple

stuff from all reset drivers.  However, it did have some difference

from existing reset-lantiq.c since SoC becomes more and more complex.

1. reset-lantiq.c use index instead of register offset + bit position.

index reset is good for a small system (< 64). However, it will become very

difficult to use if you have  > 100 reset. So we use register offset + 
bit position

2. reset-lantiq.c does not support device restart which is part of the 
reset in

old lantiq SoC. It moved this part into arch/mips/lantiq directory.

3. reset-lantiqc reset callback doesn't implement what hardware implemented

function. In old SoCs, some bits in the same register can be hardware 
reset clear.

It just call assert + assert. For these SoCs, we should only call 
assert, hardware

will auto deassert.

4. Code not optimized and intel internal review not assessed.

Based on the above findings, I would suggest reset-lantiq.c to move to 
reset-intel-syscon.c

What is your opinion?


Chuanhua

>
>
> Martin
>
>
> [0] https://wikidevi.com/wiki/Lantiq

  reply	other threads:[~2019-08-26  4:01 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-23  5:28 [PATCH v2 1/2] dt-bindings: reset: Add YAML schemas for the Intel Reset controller Dilip Kota
2019-08-23  5:28 ` [PATCH v2 2/2] reset: Reset controller driver for Intel LGM SoC Dilip Kota
2019-08-23  8:43   ` Philipp Zabel
2019-08-23  9:47     ` Dilip Kota
2019-08-23 10:09       ` Philipp Zabel
2019-08-26  7:01         ` Dilip Kota
2019-08-24 21:11   ` Martin Blumenstingl
2019-08-26  4:01     ` Chuan Hua, Lei [this message]
2019-08-26 21:49       ` Martin Blumenstingl
2019-08-27  2:23         ` Chuan Hua, Lei
2019-08-27 21:15           ` Martin Blumenstingl
2019-08-28  1:53             ` Chuan Hua, Lei
2019-08-28 20:01               ` Martin Blumenstingl
2019-08-29  2:50                 ` Chuan Hua, Lei
2019-08-29 21:40                   ` Martin Blumenstingl
2019-08-30  3:01                     ` Chuan Hua, Lei
2019-09-01 21:38                       ` Martin Blumenstingl
2019-09-02  9:45                         ` Chuan Hua, Lei
2019-09-02 22:04                           ` Martin Blumenstingl
2019-09-05  2:38                             ` Chuan Hua, Lei
2019-09-05 20:53                               ` Martin Blumenstingl
2019-09-12  6:21                                 ` Dilip Kota
2019-09-12  6:25                                   ` Dilip Kota
2019-09-12  6:38                                 ` Dilip Kota
2019-09-19  8:05                                   ` Dilip Kota
2019-09-19  8:36                                     ` Langer, Thomas
2019-09-19  9:12                                       ` Dilip Kota
2019-09-19 19:51                                   ` Martin Blumenstingl
2019-09-20  2:47                                     ` Dilip Kota
     [not found]                                       ` <29965a80-642b-8f11-b3d4-25c09c3d96cc@linux.intel.com>
2019-10-03  6:50                                         ` Dilip Kota
2019-10-03 14:19                                     ` Philipp Zabel
2019-10-07 19:53                                       ` Martin Blumenstingl
2019-10-08  2:47                                         ` Dilip Kota
2019-10-08 15:56                                         ` Philipp Zabel
2019-10-14  9:41                                           ` Dilip Kota
2019-08-23 12:25 ` [PATCH v2 1/2] dt-bindings: reset: Add YAML schemas for the Intel Reset controller Rob Herring
2019-08-26  9:52   ` Dilip Kota
2019-08-26 11:23     ` Rob Herring
2019-08-27 14:04       ` Dilip Kota
2019-08-28  2:59         ` Dilip Kota

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=3813e658-1600-d878-61a4-29b4fe51b281@linux.intel.com \
    --to=chuanhua.lei@linux.intel.com \
    --cc=cheol.yong.kim@intel.com \
    --cc=devicetree@vger.kernel.org \
    --cc=eswara.kota@linux.intel.com \
    --cc=hauke@hauke-m.de \
    --cc=linux-kernel@vger.kernel.org \
    --cc=martin.blumenstingl@googlemail.com \
    --cc=p.zabel@pengutronix.de \
    --cc=qi-ming.wu@intel.com \
    --cc=robh@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).