Re: [PATCH v2 19/23] staging: media: tegra-video: tegra20: expand format support with RAW8/10 and YUV422 1X16

[Mikko Perttunen <mperttunen@nvidia.com>]

On Saturday, September 6, 2025 10:53 PM Svyatoslav Ryhel wrote:
> Add support for Bayer formats (RAW8 and RAW10) and YUV422_8 1X16 versions
> of existing YUV422_8 2X8.
> 
> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
> ---
>  drivers/staging/media/tegra-video/tegra20.c | 72 ++++++++++++++++++++-
>  1 file changed, 69 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/staging/media/tegra-video/tegra20.c b/drivers/staging/media/tegra-video/tegra20.c
> index 3c5bafebfcd8..f9adb0611638 100644
> --- a/drivers/staging/media/tegra-video/tegra20.c
> +++ b/drivers/staging/media/tegra-video/tegra20.c
> @@ -187,6 +187,18 @@ static void tegra20_vi_get_input_formats(struct tegra_vi_channel *chan,
>  	case MEDIA_BUS_FMT_YVYU8_2X8:
>  		(*yuv_input_format) = VI_INPUT_YUV_INPUT_FORMAT_YVYU;
>  		break;
> +	/* RAW8 */
> +	case MEDIA_BUS_FMT_SBGGR8_1X8:
> +	case MEDIA_BUS_FMT_SGBRG8_1X8:
> +	case MEDIA_BUS_FMT_SGRBG8_1X8:
> +	case MEDIA_BUS_FMT_SRGGB8_1X8:
> +	/* RAW10 */
> +	case MEDIA_BUS_FMT_SBGGR10_1X10:
> +	case MEDIA_BUS_FMT_SGBRG10_1X10:
> +	case MEDIA_BUS_FMT_SGRBG10_1X10:
> +	case MEDIA_BUS_FMT_SRGGB10_1X10:
> +		(*main_input_format) = VI_INPUT_INPUT_FORMAT_BAYER;
> +		break;
>  	}
>  }
>  
> @@ -221,6 +233,18 @@ static void tegra20_vi_get_output_formats(struct tegra_vi_channel *chan,
>  	case V4L2_PIX_FMT_YVU420:
>  		(*main_output_format) = VI_OUTPUT_OUTPUT_FORMAT_YUV420PLANAR;
>  		break;
> +	/* RAW8 */
> +	case V4L2_PIX_FMT_SBGGR8:
> +	case V4L2_PIX_FMT_SGBRG8:
> +	case V4L2_PIX_FMT_SGRBG8:
> +	case V4L2_PIX_FMT_SRGGB8:
> +	/* RAW10 */
> +	case V4L2_PIX_FMT_SBGGR10:
> +	case V4L2_PIX_FMT_SGBRG10:
> +	case V4L2_PIX_FMT_SGRBG10:
> +	case V4L2_PIX_FMT_SRGGB10:
> +		(*main_output_format) = VI_OUTPUT_OUTPUT_FORMAT_VIP_BAYER_DIRECT;
> +		break;
>  	}
>  }
>  
> @@ -301,6 +325,16 @@ static void tegra20_channel_queue_setup(struct tegra_vi_channel *chan)
>  	case V4L2_PIX_FMT_VYUY:
>  	case V4L2_PIX_FMT_YUYV:
>  	case V4L2_PIX_FMT_YVYU:
> +	/* RAW8 */
> +	case V4L2_PIX_FMT_SRGGB8:
> +	case V4L2_PIX_FMT_SGRBG8:
> +	case V4L2_PIX_FMT_SGBRG8:
> +	case V4L2_PIX_FMT_SBGGR8:
> +	/* RAW10 */
> +	case V4L2_PIX_FMT_SRGGB10:
> +	case V4L2_PIX_FMT_SGRBG10:
> +	case V4L2_PIX_FMT_SGBRG10:
> +	case V4L2_PIX_FMT_SBGGR10:
>  		if (chan->vflip)
>  			chan->start_offset += stride * (height - 1);
>  		if (chan->hflip)
> @@ -366,6 +400,19 @@ static void tegra20_channel_vi_buffer_setup(struct tegra_vi_channel *chan,
>  		tegra20_vi_write(chan, TEGRA_VI_VB0_BASE_ADDRESS(TEGRA_VI_OUT_1),  base);
>  		tegra20_vi_write(chan, TEGRA_VI_VB0_START_ADDRESS(TEGRA_VI_OUT_1), base + chan->start_offset);
>  		break;
> +	/* RAW8 */
> +	case V4L2_PIX_FMT_SRGGB8:
> +	case V4L2_PIX_FMT_SGRBG8:
> +	case V4L2_PIX_FMT_SGBRG8:
> +	case V4L2_PIX_FMT_SBGGR8:
> +	/* RAW10 */
> +	case V4L2_PIX_FMT_SRGGB10:
> +	case V4L2_PIX_FMT_SGRBG10:
> +	case V4L2_PIX_FMT_SGBRG10:
> +	case V4L2_PIX_FMT_SBGGR10:
> +		tegra20_vi_write(chan, TEGRA_VI_VB0_BASE_ADDRESS(TEGRA_VI_OUT_2),  base);
> +		tegra20_vi_write(chan, TEGRA_VI_VB0_START_ADDRESS(TEGRA_VI_OUT_2), base + chan->start_offset);
> +		break;
>  	}
>  }
>  
> @@ -447,12 +494,15 @@ static int tegra20_chan_capture_kthread_start(void *data)
>  static void tegra20_camera_capture_setup(struct tegra_vi_channel *chan)
>  {
>  	u32 output_fourcc = chan->format.pixelformat;
> +	u32 data_type = chan->fmtinfo->img_dt;
>  	int width  = chan->format.width;
>  	int height = chan->format.height;
>  	int stride_l = chan->format.bytesperline;
>  	int stride_c = (output_fourcc == V4L2_PIX_FMT_YUV420 ||
>  			output_fourcc == V4L2_PIX_FMT_YVU420) ? 1 : 0;
> -	enum tegra_vi_out output_channel = TEGRA_VI_OUT_1;
> +	enum tegra_vi_out output_channel = (data_type == TEGRA_IMAGE_DT_RAW8 ||
> +					    data_type == TEGRA_IMAGE_DT_RAW10) ?
> +					    TEGRA_VI_OUT_2 : TEGRA_VI_OUT_1;
>  	int main_output_format;
>  	int yuv_output_format;
>  
> @@ -581,6 +631,20 @@ static const struct tegra_video_format tegra20_video_formats[] = {
>  	TEGRA20_VIDEO_FMT(YUV422_8, 16, YVYU8_2X8, 16, YVYU),
>  	TEGRA20_VIDEO_FMT(YUV422_8, 16, UYVY8_2X8, 12, YUV420),
>  	TEGRA20_VIDEO_FMT(YUV422_8, 16, UYVY8_2X8, 12, YVU420),
> +	TEGRA20_VIDEO_FMT(YUV422_8, 16, UYVY8_1X16, 16, UYVY),
> +	TEGRA20_VIDEO_FMT(YUV422_8, 16, VYUY8_1X16, 16, VYUY),
> +	TEGRA20_VIDEO_FMT(YUV422_8, 16, YUYV8_1X16, 16, YUYV),
> +	TEGRA20_VIDEO_FMT(YUV422_8, 16, YVYU8_1X16, 16, YVYU),
> +	/* RAW 8 */
> +	TEGRA20_VIDEO_FMT(RAW8, 8, SRGGB8_1X8, 16, SRGGB8),
> +	TEGRA20_VIDEO_FMT(RAW8, 8, SGRBG8_1X8, 16, SGRBG8),
> +	TEGRA20_VIDEO_FMT(RAW8, 8, SGBRG8_1X8, 16, SGBRG8),
> +	TEGRA20_VIDEO_FMT(RAW8, 8, SBGGR8_1X8, 16, SBGGR8),
> +	/* RAW 10 */
> +	TEGRA20_VIDEO_FMT(RAW10, 10, SRGGB10_1X10, 16, SRGGB10),
> +	TEGRA20_VIDEO_FMT(RAW10, 10, SGRBG10_1X10, 16, SGRBG10),
> +	TEGRA20_VIDEO_FMT(RAW10, 10, SGBRG10_1X10, 16, SGBRG10),
> +	TEGRA20_VIDEO_FMT(RAW10, 10, SBGGR10_1X10, 16, SBGGR10),
>  };
>  
>  const struct tegra_vi_soc tegra20_vi_soc = {
> @@ -607,10 +671,12 @@ const struct tegra_vi_soc tegra20_vi_soc = {
>  static int tegra20_vip_start_streaming(struct tegra_vip_channel *vip_chan)
>  {
>  	struct tegra_vi_channel *vi_chan = v4l2_get_subdev_hostdata(&vip_chan->subdev);
> +	u32 data_type = vi_chan->fmtinfo->img_dt;
>  	int width  = vi_chan->format.width;
>  	int height = vi_chan->format.height;
> -	enum tegra_vi_out output_channel = TEGRA_VI_OUT_1;
> -
> +	enum tegra_vi_out output_channel = (data_type == TEGRA_IMAGE_DT_RAW8 ||
> +					    data_type == TEGRA_IMAGE_DT_RAW10) ?
> +					    TEGRA_VI_OUT_2 : TEGRA_VI_OUT_1;
>  	unsigned int main_input_format;
>  	unsigned int yuv_input_format;
>  
> 

Seems fine by me though I'm not familiar with the v4l2 specifics.

Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>