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From: Tudor Ambarus <tudor.ambarus@linaro.org>
To: "André Draszik" <andre.draszik@linaro.org>,
	peter.griffin@linaro.org, robh+dt@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, mturquette@baylibre.com,
	sboyd@kernel.org, conor+dt@kernel.org, andi.shyti@kernel.org,
	alim.akhtar@samsung.com, gregkh@linuxfoundation.org,
	jirislaby@kernel.org, s.nawrocki@samsung.com,
	tomasz.figa@gmail.com, cw00.choi@samsung.com, arnd@arndb.de,
	semen.protsenko@linaro.org
Cc: saravanak@google.com, willmcvicker@google.com,
	linux-arm-kernel@lists.infradead.org,
	linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-i2c@vger.kernel.org, linux-serial@vger.kernel.org,
	kernel-team@android.com
Subject: Re: [PATCH v2 11/12] arm64: dts: exynos: gs101: define USI8 with I2C configuration
Date: Fri, 29 Dec 2023 08:04:21 +0000	[thread overview]
Message-ID: <387303b4-d912-480c-a50c-9f9efa386ef3@linaro.org> (raw)
In-Reply-To: <a40b5d0dc3e151fede14aa00bcb853d1eeb8824b.camel@linaro.org>



On 12/28/23 14:04, André Draszik wrote:
> Hi Tudor,

Hi!

> 
> On Thu, 2023-12-28 at 12:58 +0000, Tudor Ambarus wrote:
>> [...]
>>
>> diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
>> index 0e5b1b490b0b..c6ae33016992 100644
>> --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
>> +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
>> @@ -354,6 +354,35 @@ pinctrl_peric0: pinctrl@10840000 {
>>  			interrupts = <GIC_SPI 625 IRQ_TYPE_LEVEL_HIGH 0>;
>>  		};
>>  
>> +		usi8: usi@109700c0 {
>> +			compatible = "google,gs101-usi",
>> +				     "samsung,exynos850-usi";
>> +			reg = <0x109700c0 0x20>;
>> +			ranges;
>> +			#address-cells = <1>;
>> +			#size-cells = <1>;
>> +			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_7>,
>> +				 <&cmu_peric0 CLK_GOUT_PERIC0_CLK_PERIC0_USI8_USI_CLK>;
>> +			clock-names = "pclk", "ipclk";
> 
> Given the clock-names, shouldn't the clock indices be the other way around? Also see below.

You're right, they should have been the other way around! Didn't make
any difference at testing because the usi driver uses
clk_bulk_prepare_enable(), what matters is the order of clocks in the
i2c node, and those are fine.

> 
>> +			samsung,sysreg = <&sysreg_peric0 0x101c>;
>> +			status = "disabled";
>> +
>> +			hsi2c_8: i2c@10970000 {
>> +				compatible = "google,gs101-hsi2c",
>> +					     "samsung,exynosautov9-hsi2c";
>> +				reg = <0x10970000 0xc0>;
>> +				interrupts = <GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH 0>;
>> +				#address-cells = <1>;
>> +				#size-cells = <0>;
>> +				pinctrl-names = "default";
>> +				pinctrl-0 = <&hsi2c8_bus>;
>> +				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_7>,
>> +					 <&cmu_peric0 CLK_GOUT_PERIC0_CLK_PERIC0_USI8_USI_CLK>;
>> +				clock-names = "hsi2c", "hsi2c_pclk";
> 
> Here, pclk == CLK_GOUT_PERIC0_CLK_PERIC0_USI8_USI_CLK (which is correct, I believe), whereas
> above pclk == CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_7
> 

Indeed, I'll reverse the order for the USI clocks and do some more
testing. Thanks!
ta

  reply	other threads:[~2023-12-29  8:04 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-12-28 12:57 [PATCH v2 00/12] GS101 Oriole: CMU_PERIC0 support and USI updates Tudor Ambarus
2023-12-28 12:57 ` [PATCH v2 01/12] dt-bindings: clock: google,gs101-clock: add PERIC0 clock management unit Tudor Ambarus
2024-01-08 14:18   ` Peter Griffin
2024-01-09  4:08     ` Rob Herring
2024-01-09  4:03   ` Rob Herring
2024-01-09 11:09     ` Krzysztof Kozlowski
2024-01-09 11:58       ` Tudor Ambarus
2024-01-09 15:01         ` Krzysztof Kozlowski
2024-01-09 16:12           ` Tudor Ambarus
2024-01-09 18:38             ` Krzysztof Kozlowski
2024-01-10  7:25               ` Tudor Ambarus
2023-12-28 12:57 ` [PATCH v2 02/12] dt-bindings: i2c: exynos5: add google,gs101-hsi2c compatible Tudor Ambarus
2024-01-08 14:20   ` Peter Griffin
2023-12-28 12:57 ` [PATCH v2 03/12] dt-bindings: serial: samsung: do not allow reg-io-width for gs101 Tudor Ambarus
2024-01-08 14:25   ` Peter Griffin
2023-12-28 12:57 ` [PATCH v2 04/12] tty: serial: samsung: prepare for different IO types Tudor Ambarus
2024-01-04 15:32   ` Greg KH
2024-01-04 15:41     ` Tudor Ambarus
2024-01-04 15:56       ` Greg KH
2024-01-05 10:22         ` Tudor Ambarus
2023-12-28 12:57 ` [PATCH v2 05/12] tty: serial: samsung: set UPIO_MEM32 iotype for gs101 Tudor Ambarus
2024-01-08 14:29   ` Peter Griffin
2023-12-28 12:57 ` [PATCH v2 06/12] tty: serial: samsung: add gs101 earlycon support Tudor Ambarus
2024-01-08 14:34   ` Peter Griffin
2023-12-28 12:58 ` [PATCH v2 07/12] clk: samsung: gs101: add support for cmu_peric0 Tudor Ambarus
2024-01-08 14:52   ` Peter Griffin
2023-12-28 12:58 ` [PATCH v2 08/12] arm64: dts: exynos: gs101: remove reg-io-width from serial Tudor Ambarus
2024-01-08 15:30   ` Peter Griffin
2023-12-28 12:58 ` [PATCH v2 09/12] arm64: dts: exynos: gs101: enable cmu-peric0 clock controller Tudor Ambarus
2024-01-08 15:36   ` Peter Griffin
2023-12-28 12:58 ` [PATCH v2 10/12] arm64: dts: exynos: gs101: update USI UART to use peric0 clocks Tudor Ambarus
2023-12-28 14:22   ` André Draszik
2023-12-29  8:26     ` Tudor Ambarus
2023-12-28 12:58 ` [PATCH v2 11/12] arm64: dts: exynos: gs101: define USI8 with I2C configuration Tudor Ambarus
2023-12-28 14:04   ` André Draszik
2023-12-29  8:04     ` Tudor Ambarus [this message]
2023-12-29 14:21       ` Tudor Ambarus
2023-12-28 12:58 ` [PATCH v2 12/12] arm64: dts: exynos: gs101: enable eeprom on gs101-oriole Tudor Ambarus
2024-01-08 16:15   ` Peter Griffin

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