From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
Johnson Wang <johnson.wang@mediatek.com>,
robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
sboyd@kernel.org
Cc: linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org,
Project_Global_Chrome_Upstream_Group@mediatek.com,
Edward-JW Yang <edward-jw.yang@mediatek.com>
Subject: Re: [PATCH 2/4] dt-bindings: arm: mediatek: Add new bindings of MediaTek frequency hopping
Date: Thu, 1 Sep 2022 12:42:15 +0300 [thread overview]
Message-ID: <38910de5-89ad-e7a1-261f-18b51c8e7877@linaro.org> (raw)
In-Reply-To: <1fae0c47-fff9-89e9-c849-536d167d741d@collabora.com>
On 01/09/2022 11:04, AngeloGioacchino Del Regno wrote:
> Il 31/08/22 15:19, Krzysztof Kozlowski ha scritto:
>> On 31/08/2022 15:48, Johnson Wang wrote:
>>> Add the new binding documentation for MediaTek frequency hopping
>>> and spread spectrum clocking control.
>>>
>>> Co-developed-by: Edward-JW Yang <edward-jw.yang@mediatek.com>
>>> Signed-off-by: Edward-JW Yang <edward-jw.yang@mediatek.com>
>>> Signed-off-by: Johnson Wang <johnson.wang@mediatek.com>
>>> ---
>>> .../bindings/arm/mediatek/mediatek,fhctl.yaml | 49 +++++++++++++++++++
>>> 1 file changed, 49 insertions(+)
>>> create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,fhctl.yaml
>>>
>>> diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,fhctl.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,fhctl.yaml
>>> new file mode 100644
>>> index 000000000000..c5d76410538b
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,fhctl.yaml
>>> @@ -0,0 +1,49 @@
>>> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
>>> +%YAML 1.2
>>> +---
>>> +$id: http://devicetree.org/schemas/arm/mediatek/mediatek,fhctl.yaml#
>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>>> +
>>> +title: MediaTek frequency hopping and spread spectrum clocking control
>>> +
>>> +maintainers:
>>> + - Edward-JW Yang <edward-jw.yang@mediatek.com>
>>> +
>>> +description: |
>>> + Frequency hopping control (FHCTL) is a piece of hardware that control
>>> + some PLLs to adopt "hopping" mechanism to adjust their frequency.
>>> + Spread spectrum clocking (SSC) is another function provided by this hardware.
>>> +
>>> +properties:
>>> + compatible:
>>> + const: mediatek,fhctl
>>
>> You need SoC/device specific compatibles. Preferably only SoC specific,
>> without generic fallback, unless you can guarantee (while representing
>> MediaTek), that generic fallback will cover all of their SoCs?
>>
>>> +
>>> + reg:
>>> + maxItems: 1
>>> +
>>> + mediatek,hopping-ssc-percents:
>>> + description: |
>>> + Determine the enablement of frequency hopping feature and the percentage
>>> + of spread spectrum clocking for PLLs.
>>> + $ref: /schemas/types.yaml#/definitions/uint32-matrix
>>> + items:
>>> + items:
>>> + - description: PLL id that is expected to enable frequency hopping.
>>
>> So the clocks are indices from some specific, yet unnamed
>> clock-controller? This feels hacky. You should rather take here clock
>> phandles (1) or integrate it into specific clock controller (2). The
>> reason is that either your device does something on top of existing
>> clocks (option 1, thus it takes clock as inputs) or it modifies existing
>> clocks (option 2, thus it is integral part of clock-controller).
>>
>
> FHCTL is a MCU that handles (some, or all, depending on what's supported on the
> SoC and what's needed by the board) PLL frequency setting, doing it in steps and
> avoiding overshooting and other issues.
>
> We had a pretty big conversation about this a while ago and the indices instead
> of phandles is actually my fault, that happened because I initially proposed your
> option 2 but then for a number of reasons we went with this kind of solution.
>
> I know it's going to be a long read, but the entire conversation is on the list [1]
>
Sorry, but it's a hacky architecture where one device (which is a clock
provider) and second device have no relationship in hardware description
but both play with each other resources. That's simply not a proper
hardware description, so again:
1. If this is separate device (as you indicated), then it needs
expressing the dependencies and uses of other device resources.
2. If this is not a separate device, but integral part of clock
controller, then it would be fine but then probably should be child of
that device.
Best regards,
Krzysztof
next prev parent reply other threads:[~2022-09-01 9:43 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-31 12:48 [PATCH 0/4] Introduce MediaTek frequency hopping driver Johnson Wang
2022-08-31 12:48 ` [PATCH 1/4] clk: mediatek: Export PLL operations symbols Johnson Wang
2022-08-31 12:48 ` [PATCH 2/4] dt-bindings: arm: mediatek: Add new bindings of MediaTek frequency hopping Johnson Wang
2022-08-31 13:19 ` Krzysztof Kozlowski
2022-09-01 8:04 ` AngeloGioacchino Del Regno
2022-09-01 9:42 ` Krzysztof Kozlowski [this message]
2022-09-01 10:22 ` AngeloGioacchino Del Regno
2022-09-01 10:30 ` Krzysztof Kozlowski
2022-09-01 10:32 ` AngeloGioacchino Del Regno
2022-09-01 9:43 ` Krzysztof Kozlowski
2022-09-02 6:39 ` Johnson Wang
2022-09-05 10:05 ` Krzysztof Kozlowski
2022-08-31 12:48 ` [PATCH 3/4] clk: mediatek: Add new clock driver to handle FHCTL hardware Johnson Wang
2022-09-01 8:05 ` AngeloGioacchino Del Regno
2022-09-06 6:13 ` Edward-JW Yang
2022-09-06 6:15 ` Edward-JW Yang
2022-08-31 12:48 ` [PATCH 4/4] clk: mediatek: Change PLL register API for MT8186 Johnson Wang
2022-08-31 13:20 ` [PATCH 0/4] Introduce MediaTek frequency hopping driver Krzysztof Kozlowski
2022-09-02 6:39 ` Johnson Wang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=38910de5-89ad-e7a1-261f-18b51c8e7877@linaro.org \
--to=krzysztof.kozlowski@linaro.org \
--cc=Project_Global_Chrome_Upstream_Group@mediatek.com \
--cc=angelogioacchino.delregno@collabora.com \
--cc=devicetree@vger.kernel.org \
--cc=edward-jw.yang@mediatek.com \
--cc=johnson.wang@mediatek.com \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mediatek@lists.infradead.org \
--cc=robh+dt@kernel.org \
--cc=sboyd@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).