* [PATCH 0/2] Enable tsens and thermal for sa8775p SoC
@ 2023-08-21 11:29 Priyansh Jain
2023-08-21 11:29 ` [PATCH 1/2] dt-bindings: thermal: tsens: Add sa8775p compatible Priyansh Jain
2023-08-21 11:29 ` [PATCH 2/2] arm64: dts: qcom: Enable tsens and thermal for sa8775p SoC Priyansh Jain
0 siblings, 2 replies; 7+ messages in thread
From: Priyansh Jain @ 2023-08-21 11:29 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Amit Kucheria,
Thara Gopinath, Rafael J . Wysocki, Daniel Lezcano, Zhang Rui,
Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, linux-pm, devicetree, linux-kernel, quic_manafm,
quic_priyjain
Adding compatible string in TSENS dt-bindings, device node
for TSENS controller and Thermal zone support
Priyansh Jain (2):
dt-bindings: thermal: tsens: Add sa8775p compatible
arm64: dts: qcom: Enable tsens and thermal for sa8775p SoC
.../bindings/thermal/qcom-tsens.yaml | 1 +
arch/arm64/boot/dts/qcom/sa8775p.dtsi | 1096 +++++++++++++++++
2 files changed, 1097 insertions(+)
--
2.17.1
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 1/2] dt-bindings: thermal: tsens: Add sa8775p compatible
2023-08-21 11:29 [PATCH 0/2] Enable tsens and thermal for sa8775p SoC Priyansh Jain
@ 2023-08-21 11:29 ` Priyansh Jain
2023-08-21 11:51 ` Konrad Dybcio
2023-08-21 11:29 ` [PATCH 2/2] arm64: dts: qcom: Enable tsens and thermal for sa8775p SoC Priyansh Jain
1 sibling, 1 reply; 7+ messages in thread
From: Priyansh Jain @ 2023-08-21 11:29 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Amit Kucheria,
Thara Gopinath, Rafael J . Wysocki, Daniel Lezcano, Zhang Rui,
Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, linux-pm, devicetree, linux-kernel, quic_manafm,
quic_priyjain
Add compatibility string for the thermal sensors on sa8775p platform.
Signed-off-by: Priyansh Jain <quic_priyjain@quicinc.com>
---
Documentation/devicetree/bindings/thermal/qcom-tsens.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
index 27e9e16e6455..37d0c9150327 100644
--- a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
+++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
@@ -65,6 +65,7 @@ properties:
- qcom,sm8350-tsens
- qcom,sm8450-tsens
- qcom,sm8550-tsens
+ - qcom,sa8775p-tsens
- const: qcom,tsens-v2
- description: v2 of TSENS with combined interrupt
--
2.17.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 2/2] arm64: dts: qcom: Enable tsens and thermal for sa8775p SoC
2023-08-21 11:29 [PATCH 0/2] Enable tsens and thermal for sa8775p SoC Priyansh Jain
2023-08-21 11:29 ` [PATCH 1/2] dt-bindings: thermal: tsens: Add sa8775p compatible Priyansh Jain
@ 2023-08-21 11:29 ` Priyansh Jain
2023-08-21 11:55 ` Konrad Dybcio
1 sibling, 1 reply; 7+ messages in thread
From: Priyansh Jain @ 2023-08-21 11:29 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Amit Kucheria,
Thara Gopinath, Rafael J . Wysocki, Daniel Lezcano, Zhang Rui,
Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, linux-pm, devicetree, linux-kernel, quic_manafm,
quic_priyjain
Add tsens and thermal devicetree node for sa8775p SoC.
Signed-off-by: Priyansh Jain <quic_priyjain@quicinc.com>
---
arch/arm64/boot/dts/qcom/sa8775p.dtsi | 1096 +++++++++++++++++++++++++
1 file changed, 1096 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
index b130136acffe..b9c622b3bf7e 100644
--- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
+++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
@@ -2306,6 +2306,1102 @@
#freq-domain-cells = <1>;
};
+
+ tsens0: thermal-sensor@c222000 {
+ compatible = "qcom,sa8775p-tsens", "qcom,tsens-v2";
+ reg = <0x0C263000 0x1ff>, /* TM */
+ <0x0C222000 0x1ff>; /* SROT */
+ #qcom,sensors = <12>;
+ interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "uplow","critical";
+ #thermal-sensor-cells = <1>;
+ };
+
+ tsens1: thermal-sensor@c223000 {
+ compatible = "qcom,sa8775p-tsens", "qcom,tsens-v2";
+ reg = <0x0C265000 0x1ff>, /* TM */
+ <0x0C223000 0x1ff>; /* SROT */
+ #qcom,sensors = <12>;
+ interrupts = <GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "uplow","critical";
+ #thermal-sensor-cells = <1>;
+ };
+
+ tsens2: thermal-sensor@c224000 {
+ compatible = "qcom,sa8775p-tsens", "qcom,tsens-v2";
+ reg = <0x0C251000 0x1ff>, /* TM */
+ <0x0C224000 0x1ff>; /* SROT */
+ #qcom,sensors = <13>;
+ interrupts = <GIC_SPI 572 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 609 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "uplow","critical";
+ #thermal-sensor-cells = <1>;
+ };
+
+ tsens3: thermal-sensor@c225000 {
+ compatible = "qcom,sa8775p-tsens", "qcom,tsens-v2";
+ reg = <0x0C252000 0x1ff>, /* TM */
+ <0x0C225000 0x1ff>; /* SROT */
+ #qcom,sensors = <13>;
+ interrupts = <GIC_SPI 573 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 610 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "uplow","critical";
+ #thermal-sensor-cells = <1>;
+ };
+
+ thermal_zones: thermal-zones {
+ aoss-0-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens0 0>;
+
+ trips {
+ aoss0_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ aoss0_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ cpu-0-0-0-thermal {
+ polling-delay-passive = <10>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens0 1>;
+
+ trips {
+ cpu000_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ cpu000_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ cpu-0-1-0-thermal {
+ polling-delay-passive = <10>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens0 2>;
+
+ trips {
+ cpu010_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ cpu010_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ cpu-0-2-0-thermal {
+ polling-delay-passive = <10>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens0 3>;
+
+ trips {
+ cpu020_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ cpu020_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ cpu-0-3-0-thermal {
+ polling-delay-passive = <10>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens0 4>;
+
+ trips {
+ cpu030_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ cpu030_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ gpuss-0-thermal {
+ polling-delay-passive = <10>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens0 5>;
+
+ trips {
+ gpuss0_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ gpuss0_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ gpuss-1-thermal {
+ polling-delay-passive = <10>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens0 6>;
+
+ trips {
+ gpuss1_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ gpuss1_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ gpuss-2-thermal {
+ polling-delay-passive = <10>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens0 7>;
+
+ trips {
+ gpuss2_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ gpuss2_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ audio-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens0 8>;
+
+ trips {
+ audio_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ audio_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ camss-0-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens0 9>;
+
+ trips {
+ camss0_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ camss0_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ pcie-0-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens0 10>;
+
+ trips {
+ pcie0_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ pcie0_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ cpuss-0-0-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens0 11>;
+
+ trips {
+ cpuss00_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ cpuss00_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ aoss-1-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens1 0>;
+
+ trips {
+ aoss1_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ aoss1_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ cpu-0-0-1-thermal {
+ polling-delay-passive = <10>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens1 1>;
+
+ trips {
+ cpu001_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ cpu001_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ cpu-0-1-1-thermal {
+ polling-delay-passive = <10>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens1 2>;
+
+ trips {
+ cpu011_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ cpu011_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ cpu-0-2-1-thermal {
+ polling-delay-passive = <10>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens1 3>;
+
+ trips {
+ cpu021_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ cpu021_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ cpu-0-3-1-thermal {
+ polling-delay-passive = <10>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens1 4>;
+
+ trips {
+ cpu031_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ cpu031_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ gpuss-3-thermal {
+ polling-delay-passive = <10>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens1 5>;
+
+ trips {
+ gpuss3_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ gpuss3_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ gpuss-4-thermal {
+ polling-delay-passive = <10>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens1 6>;
+
+ trips {
+ gpuss4_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ gpuss4_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ gpuss-5-thermal {
+ polling-delay-passive = <10>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens1 7>;
+
+ trips {
+ gpuss5_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ gpuss5_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ video-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens1 8>;
+
+ trips {
+ video_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ video_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ camss-1-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens1 9>;
+
+ trips {
+ camss1_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ camss1_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ pcie-1-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens1 10>;
+
+ trips {
+ pcie1_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ pcie1_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ cpuss-0-1-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens1 11>;
+
+ trips {
+ cpuss01_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ cpuss01_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ aoss-2-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens2 0>;
+
+ trips {
+ aoss2_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ aoss2_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ cpu-1-0-0-thermal {
+ polling-delay-passive = <10>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens2 1>;
+
+ trips {
+ cpu100_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ cpu100_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ cpu-1-1-0-thermal {
+ polling-delay-passive = <10>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens2 2>;
+
+ trips {
+ cpu110_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ cpu110_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ cpu-1-2-0-thermal {
+ polling-delay-passive = <10>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens2 3>;
+
+ trips {
+ cpu120_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ cpu120_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ cpu-1-3-0-thermal {
+ polling-delay-passive = <10>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens2 4>;
+
+ trips {
+ cpu130_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ cpu130_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ nsp-0-0-0-thermal {
+ polling-delay-passive = <10>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens2 5>;
+
+ trips {
+ nsp000_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ nsp000_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ nsp-0-1-0-thermal {
+ polling-delay-passive = <10>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens2 6>;
+
+ trips {
+ nsp010_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ nsp010_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ nsp-0-2-0-thermal {
+ polling-delay-passive = <10>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens2 7>;
+
+ trips {
+ nsp020_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ nsp020_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ nsp-1-0-0-thermal {
+ polling-delay-passive = <10>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens2 8>;
+
+ trips {
+ nsp100_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ nsp100_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ nsp-1-1-0-thermal {
+ polling-delay-passive = <10>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens2 9>;
+
+ trips {
+ nsp110_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ nsp110_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ nsp-1-2-0-thermal {
+ polling-delay-passive = <10>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens2 10>;
+
+ trips {
+ nsp120_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ nsp120_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ ddrss-0-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens2 11>;
+
+ trips {
+ ddrss0_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ ddrss0_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ cpuss-1-0-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens2 12>;
+
+ trips {
+ cpuss10_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ cpuss10_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ aoss-3-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens3 0>;
+
+ trips {
+ aoss3_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ aoss3_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ cpu-1-0-1-thermal {
+ polling-delay-passive = <10>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens3 1>;
+
+ trips {
+ cpu101_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ cpu101_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ cpu-1-1-1-thermal {
+ polling-delay-passive = <10>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens3 2>;
+
+ trips {
+ cpu111_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ cpu111_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ cpu-1-2-1-thermal {
+ polling-delay-passive = <10>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens3 3>;
+
+ trips {
+ cpu121_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ cpu121_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ cpu-1-3-1-thermal {
+ polling-delay-passive = <10>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens3 4>;
+
+ trips {
+ cpu131_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ cpu131_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ nsp-0-0-1-thermal {
+ polling-delay-passive = <10>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens3 5>;
+
+ trips {
+ nsp001_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ nsp001_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ nsp-0-1-1-thermal {
+ polling-delay-passive = <10>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens3 6>;
+
+ trips {
+ nsp011_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ nsp011_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ nsp-0-2-1-thermal {
+ polling-delay-passive = <10>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens3 7>;
+
+ trips {
+ nsp021_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ nsp021_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ nsp-1-0-1-thermal {
+ polling-delay-passive = <10>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens3 8>;
+
+ trips {
+ nsp101_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ nsp101_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ nsp-1-1-1-thermal {
+ polling-delay-passive = <10>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens3 9>;
+
+ trips {
+ nsp111_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ nsp111_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ nsp-1-2-1-thermal {
+ polling-delay-passive = <10>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens3 10>;
+
+ trips {
+ nsp121_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ nsp121_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ ddrss-1-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens3 11>;
+
+ trips {
+ ddrss1_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ ddrss1_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ cpuss-1-1-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens3 12>;
+
+ trips {
+ cpuss11_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ cpuss11_alert1: trip-point1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+ };
};
arch_timer: timer {
--
2.17.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 1/2] dt-bindings: thermal: tsens: Add sa8775p compatible
2023-08-21 11:29 ` [PATCH 1/2] dt-bindings: thermal: tsens: Add sa8775p compatible Priyansh Jain
@ 2023-08-21 11:51 ` Konrad Dybcio
2023-08-24 9:29 ` Priyansh Jain
0 siblings, 1 reply; 7+ messages in thread
From: Konrad Dybcio @ 2023-08-21 11:51 UTC (permalink / raw)
To: Priyansh Jain, Andy Gross, Bjorn Andersson, Amit Kucheria,
Thara Gopinath, Rafael J . Wysocki, Daniel Lezcano, Zhang Rui,
Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, linux-pm, devicetree, linux-kernel, quic_manafm
On 21.08.2023 13:29, Priyansh Jain wrote:
> Add compatibility string for the thermal sensors on sa8775p platform.
>
> Signed-off-by: Priyansh Jain <quic_priyjain@quicinc.com>
> ---
> Documentation/devicetree/bindings/thermal/qcom-tsens.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
> index 27e9e16e6455..37d0c9150327 100644
> --- a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
> +++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
> @@ -65,6 +65,7 @@ properties:
> - qcom,sm8350-tsens
> - qcom,sm8450-tsens
> - qcom,sm8550-tsens
> + - qcom,sa8775p-tsens
> - const: qcom,tsens-v2
Please keep this sorted alphanumerically.
Konrad
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/2] arm64: dts: qcom: Enable tsens and thermal for sa8775p SoC
2023-08-21 11:29 ` [PATCH 2/2] arm64: dts: qcom: Enable tsens and thermal for sa8775p SoC Priyansh Jain
@ 2023-08-21 11:55 ` Konrad Dybcio
2023-08-24 11:23 ` Priyansh Jain
0 siblings, 1 reply; 7+ messages in thread
From: Konrad Dybcio @ 2023-08-21 11:55 UTC (permalink / raw)
To: Priyansh Jain, Andy Gross, Bjorn Andersson, Amit Kucheria,
Thara Gopinath, Rafael J . Wysocki, Daniel Lezcano, Zhang Rui,
Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, linux-pm, devicetree, linux-kernel, quic_manafm
On 21.08.2023 13:29, Priyansh Jain wrote:
> Add tsens and thermal devicetree node for sa8775p SoC.
>
> Signed-off-by: Priyansh Jain <quic_priyjain@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/sa8775p.dtsi | 1096 +++++++++++++++++++++++++
> 1 file changed, 1096 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> index b130136acffe..b9c622b3bf7e 100644
> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> @@ -2306,6 +2306,1102 @@
>
> #freq-domain-cells = <1>;
> };
> +
> + tsens0: thermal-sensor@c222000 {
> + compatible = "qcom,sa8775p-tsens", "qcom,tsens-v2";
> + reg = <0x0C263000 0x1ff>, /* TM */
> + <0x0C222000 0x1ff>; /* SROT */
1. Test your patches. This will obviously not work due to the
#address/size-cells values of /soc@0.
2. Use lowercase hex.
3. Align subsequent entries for a property with the previous line
4. Are you sure SROT is 0x1ff-long?
5. The usefulness of these comments is questionable, many DTs have
them because of copypasta but I think it's time to stop that.
6. No pdc wake-capable interrupts?
> + #qcom,sensors = <12>;
> + interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "uplow","critical";
Missing space after the comma
Please move interrupt properties right after 'reg'.
Konrad
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/2] dt-bindings: thermal: tsens: Add sa8775p compatible
2023-08-21 11:51 ` Konrad Dybcio
@ 2023-08-24 9:29 ` Priyansh Jain
0 siblings, 0 replies; 7+ messages in thread
From: Priyansh Jain @ 2023-08-24 9:29 UTC (permalink / raw)
To: Konrad Dybcio, Andy Gross, Bjorn Andersson, Amit Kucheria,
Thara Gopinath, Rafael J . Wysocki, Daniel Lezcano, Zhang Rui,
Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, linux-pm, devicetree, linux-kernel, quic_manafm
Hi Konrad,
On 8/21/2023 5:21 PM, Konrad Dybcio wrote:
> On 21.08.2023 13:29, Priyansh Jain wrote:
>> Add compatibility string for the thermal sensors on sa8775p platform.
>>
>> Signed-off-by: Priyansh Jain <quic_priyjain@quicinc.com>
>> ---
>> Documentation/devicetree/bindings/thermal/qcom-tsens.yaml | 1 +
>> 1 file changed, 1 insertion(+)
>>
>> diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
>> index 27e9e16e6455..37d0c9150327 100644
>> --- a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
>> +++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
>> @@ -65,6 +65,7 @@ properties:
>> - qcom,sm8350-tsens
>> - qcom,sm8450-tsens
>> - qcom,sm8550-tsens
>> + - qcom,sa8775p-tsens
>> - const: qcom,tsens-v2
> Please keep this sorted alphanumerically.
Sure will update in next revision.
> Konrad
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/2] arm64: dts: qcom: Enable tsens and thermal for sa8775p SoC
2023-08-21 11:55 ` Konrad Dybcio
@ 2023-08-24 11:23 ` Priyansh Jain
0 siblings, 0 replies; 7+ messages in thread
From: Priyansh Jain @ 2023-08-24 11:23 UTC (permalink / raw)
To: Konrad Dybcio, Andy Gross, Bjorn Andersson, Amit Kucheria,
Thara Gopinath, Rafael J . Wysocki, Daniel Lezcano, Zhang Rui,
Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, linux-pm, devicetree, linux-kernel, quic_manafm
Hi Konrad,
On 8/21/2023 5:25 PM, Konrad Dybcio wrote:
> On 21.08.2023 13:29, Priyansh Jain wrote:
>> Add tsens and thermal devicetree node for sa8775p SoC.
>>
>> Signed-off-by: Priyansh Jain <quic_priyjain@quicinc.com>
>> ---
>> arch/arm64/boot/dts/qcom/sa8775p.dtsi | 1096 +++++++++++++++++++++++++
>> 1 file changed, 1096 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
>> index b130136acffe..b9c622b3bf7e 100644
>> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
>> @@ -2306,6 +2306,1102 @@
>>
>> #freq-domain-cells = <1>;
>> };
>> +
>> + tsens0: thermal-sensor@c222000 {
>> + compatible = "qcom,sa8775p-tsens", "qcom,tsens-v2";
>> + reg = <0x0C263000 0x1ff>, /* TM */
>> + <0x0C222000 0x1ff>; /* SROT */
> 1. Test your patches. This will obviously not work due to the
> #address/size-cells values of /soc@0.
Yes this needs to be updated, Will update in the next revision.
>
> 2. Use lowercase hex.
Sure will update in next revision.
> 3. Align subsequent entries for a property with the previous line
>
Sure will update in next revision.
> 4. Are you sure SROT is 0x1ff-long?
>
Yes it can be updated to 0x8 , will update in next revision.
> 5. The usefulness of these comments is questionable, many DTs have
> them because of copypasta but I think it's time to stop that.
>
Yes will remove them in next revision.
> 6. No pdc wake-capable interrupts?
Yes they don't need to be pdc wakeup capable.
>
>> + #qcom,sensors = <12>;
>> + interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>;
>> + interrupt-names = "uplow","critical";
> Missing space after the comma
Yes will update in next revision.
>
> Please move interrupt properties right after 'reg'.
Sure will update in next revision.
> Konrad
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2023-08-24 11:25 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
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2023-08-21 11:29 [PATCH 0/2] Enable tsens and thermal for sa8775p SoC Priyansh Jain
2023-08-21 11:29 ` [PATCH 1/2] dt-bindings: thermal: tsens: Add sa8775p compatible Priyansh Jain
2023-08-21 11:51 ` Konrad Dybcio
2023-08-24 9:29 ` Priyansh Jain
2023-08-21 11:29 ` [PATCH 2/2] arm64: dts: qcom: Enable tsens and thermal for sa8775p SoC Priyansh Jain
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