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[109.252.113.89]) by smtp.googlemail.com with ESMTPSA id e14-20020a05651c038e00b00277025ddc9esm1126484ljp.54.2022.12.20.12.13.12 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 20 Dec 2022 12:13:12 -0800 (PST) Message-ID: <38c7cfe0-62e0-066a-d8dd-4ed4243a552e@gmail.com> Date: Tue, 20 Dec 2022 23:13:05 +0300 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.6.0 Subject: Re: [PATCH v2 01/21] dt-bindings: display: tegra: add Tegra20 VIP Content-Language: en-US To: Luca Ceresoli , Rob Herring , Krzysztof Kozlowski Cc: David Airlie , Daniel Vetter , Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , Mauro Carvalho Chehab , Greg Kroah-Hartman , Hans Verkuil , linux-media@vger.kernel.org, linux-tegra@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Thomas Petazzoni , Paul Kocialkowski , Richard Leitner References: <20221128152336.133953-1-luca.ceresoli@bootlin.com> <20221128152336.133953-2-luca.ceresoli@bootlin.com> <20221201231936.GB1660613-robh@kernel.org> <20221202091108.5f492d6f@booty> From: Dmitry Osipenko In-Reply-To: <20221202091108.5f492d6f@booty> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org 02.12.2022 11:11, Luca Ceresoli пишет: > Hello Rob, > > Thanks for your review. > > On Thu, 1 Dec 2022 17:19:36 -0600 > Rob Herring wrote: > >> On Mon, Nov 28, 2022 at 04:23:16PM +0100, Luca Ceresoli wrote: >>> VIP is the parallel video capture component within the video input >>> subsystem of Tegra20 (and other Tegra chips, apparently). >>> >>> Signed-off-by: Luca Ceresoli >>> >>> --- >>> >>> Changed in v2 (suggested by Krzysztof Kozlowski): >>> - remove redundant "bindings" from subject line >>> - remove $nodename >>> - add channel@0 description >>> - add reg: const: 0 >>> --- >>> .../display/tegra/nvidia,tegra20-vip.yaml | 63 +++++++++++++++++++ >>> MAINTAINERS | 7 +++ >>> 2 files changed, 70 insertions(+) >>> create mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vip.yaml >>> >>> diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vip.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vip.yaml >>> new file mode 100644 >>> index 000000000000..44be2e16c9b4 >>> --- /dev/null >>> +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vip.yaml >>> @@ -0,0 +1,63 @@ >>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >>> +%YAML 1.2 >>> +--- >>> +$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-vip.yaml# >>> +$schema: http://devicetree.org/meta-schemas/core.yaml# >>> + >>> +title: NVIDIA Tegra VIP (parallel video capture) controller >>> + >>> +maintainers: >>> + - Luca Ceresoli >>> + >>> +properties: >>> + compatible: >>> + enum: >>> + - nvidia,tegra20-vip >>> + >>> + "#address-cells": >>> + const: 1 >>> + >>> + "#size-cells": >>> + const: 0 >>> + >>> + channel@0: >> Kind of odd there is only 1 channel with a unit-address. Are more >> channels coming? Please make the binding as complete as possible even if >> no driver support yet. > This was discussed in v1 with Krzysztof and the outcome was that it's > OK because it's likely that other SoCs have more, but the documentation > is not public so I cannot add examples. > > Full discussion (pretty short indeed): > > https://lore.kernel.org/linux-devicetree/5292cc1b-c951-c5c5-b2ef-c154baf6d7fd@linaro.org/ > > Do you agree that the unit-address should be kept? It's doubtful that there is a SoC having a VIP with multiple channels. I'd expect it to be multiple VIPs rather than channels. There are NVIDIA people to confirm that. The "channel" itself looks redundant to me, i.e. the reg and ports should be moved to the vip node.