Re: [PATCH 1/3] arm64: dts: ti: k3-am625: add standby cpu idle state

[Scaria Kochidanadu <s-kochidanadu@ti.com>]

On 21/08/26 00:58, Kendall Willis wrote:
> Allow the A53 cores to enter standby mode on the AM62x SoC.
> The standby idle state enables the CPU cores to enter WFI through the
> CPUIdle framework.
>
> Signed-off-by: Kendall Willis <k-willis@ti.com>
> ---
>   arch/arm64/boot/dts/ti/k3-am625.dtsi | 17 +++++++++++++++++
>   1 file changed, 17 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-am625.dtsi b/arch/arm64/boot/dts/ti/k3-am625.dtsi
> index c249883a8a8d846aa21092c4c341fd443cfcec15..7ba339d5875926717896fc92fb2fa6d2b8d0026a 100644
> --- a/arch/arm64/boot/dts/ti/k3-am625.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am625.dtsi
> @@ -51,6 +51,7 @@ cpu0: cpu@0 {
>   			operating-points-v2 = <&a53_opp_table>;
>   			clocks = <&k3_clks 135 0>;
>   			#cooling-cells = <2>;
> +			cpu-idle-states = <&CPU_STANDBY>;
>   		};
>   
>   		cpu1: cpu@1 {
> @@ -68,6 +69,7 @@ cpu1: cpu@1 {
>   			operating-points-v2 = <&a53_opp_table>;
>   			clocks = <&k3_clks 136 0>;
>   			#cooling-cells = <2>;
> +			cpu-idle-states = <&CPU_STANDBY>;
>   		};
>   
>   		cpu2: cpu@2 {
> @@ -85,6 +87,7 @@ cpu2: cpu@2 {
>   			operating-points-v2 = <&a53_opp_table>;
>   			clocks = <&k3_clks 137 0>;
>   			#cooling-cells = <2>;
> +			cpu-idle-states = <&CPU_STANDBY>;
>   		};
>   
>   		cpu3: cpu@3 {
> @@ -102,6 +105,20 @@ cpu3: cpu@3 {
>   			operating-points-v2 = <&a53_opp_table>;
>   			clocks = <&k3_clks 138 0>;
>   			#cooling-cells = <2>;
> +			cpu-idle-states = <&CPU_STANDBY>;
> +		};
> +
> +		cpu_idle_states: idle-states {
> +			entry-method = "psci";
> +
> +			CPU_STANDBY: cpu-standby {

nit: The property ordering looks a bit unusual. Could we move the 
'idle-state-name' immediately after 'compatible'


Scaria

> +				compatible = "arm,idle-state";
> +				entry-latency-us = <100>;
> +				exit-latency-us = <50>;
> +				idle-state-name = "standby";
> +				min-residency-us = <500>;
> +				arm,psci-suspend-param = <0x00000001>;
> +			};
>   		};
>   	};
>   
>