From: Arnd Bergmann <arnd@arndb.de>
To: Paul Osmialowski <pawelo@king.net.pl>
Cc: Andrew Morton <akpm@linux-foundation.org>,
Anson Huang <b20788@freescale.com>,
Ard Biesheuvel <ard.biesheuvel@linaro.org>,
Bhupesh Sharma <bhupesh.sharma@freescale.com>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Frank Li <Frank.Li@freescale.com>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Guenter Roeck <linux@roeck-us.net>,
Haojian Zhuang <haojian.zhuang@gmail.com>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
Jingchang Lu <jingchang.lu@freescale.com>,
Jiri Slaby <jslaby@suse.cz>, Kees Cook <keescook@chromium.org>,
Kumar Gala <galak@codeaurora.org>,
Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
Linus Walleij <linus.walleij@linaro.org>,
Magnus Damm <damm+renesas@opensource.se>,
Michael Turquette <mturquette@baylibre.com>,
Nathan Lynch <nathan_lynch@mentor.com>,
Nicolas Pitre <nico@linaro.org>,
Maxime
Subject: Re: [PATCH 5/9] arm: twr-k70f120m: basic support for Kinetis TWR-K70F120M
Date: Wed, 24 Jun 2015 00:05:40 +0200 [thread overview]
Message-ID: <3935594.UmXqE2ND2k@wuerfel> (raw)
In-Reply-To: <1435094387-20146-6-git-send-email-pawelo@king.net.pl>
On Tuesday 23 June 2015 23:19:43 Paul Osmialowski wrote:
> @@ -1740,7 +1752,7 @@ source "mm/Kconfig"
> config FORCE_MAX_ZONEORDER
> int "Maximum zone order" if ARCH_SHMOBILE_LEGACY
> range 11 64 if ARCH_SHMOBILE_LEGACY
> - default "12" if SOC_AM33XX
> + default "12" if SOC_AM33XX || ARCH_KINETIS
> default "9" if SA1111 || ARCH_EFM32
> default "11"
> help
Put it in the defconfig?
> +#
> +
> +obj-$(CONFIG_MACH_KINETIS) += kinetis_platform.o
just use
obj-y += kinetis.o
> diff --git a/arch/arm/mach-kinetis/include/mach/idle.h b/arch/arm/mach-kinetis/include/mach/idle.h
> new file mode 100644
> index 0000000..0aafefd
> --- /dev/null
> +++ b/arch/arm/mach-kinetis/include/mach/idle.h
No mach/*.h files please.
> +/*
> + * This Kinetis port assumes that the CPU works in little-endian mode.
> + * Switching to big-endian will require different bit offsets in peripheral
> + * devices' registers. Also, some bit groups may lay on byte edges, so issue
> + * with big-endian cannot be fixed only by defining bit offsets differently
> + * for the big-endian mode.
> + */
> +#ifndef __LITTLE_ENDIAN
> +#error This Kinetis port assumes that the CPU works in little-endian mode
> +#endif
Fix the drivers instead?
> +/*
> + * Peripheral memory map
> + */
> +#define KINETIS_AIPS0PERIPH_BASE 0x40000000
> +#define KINETIS_AIPS1PERIPH_BASE 0x40080000
Move it into DT
> +/*
> + * System Integration Module (SIM) register map
> + *
> + * This map actually covers two hardware modules:
> + * 1. SIM low-power logic, at 0x40047000
> + * 2. System integration module (SIM), at 0x40048000
> + */
> +struct kinetis_sim_regs {
> + u32 sopt1; /* System Options Register 1 */
> + u32 rsv0[1024];
> + u32 sopt2; /* System Options Register 2 */
> + u32 rsv1;
> + u32 sopt4; /* System Options Register 4 */
> + u32 sopt5; /* System Options Register 5 */
> + u32 sopt6; /* System Options Register 6 */
> + u32 sopt7; /* System Options Register 7 */
> + u32 rsv2[2];
> + u32 sdid; /* System Device Identification Register */
> + u32 scgc[KINETIS_SIM_CG_NUMREGS]; /* Clock Gating Regs 1...7 */
> + u32 clkdiv1; /* System Clock Divider Register 1 */
> + u32 clkdiv2; /* System Clock Divider Register 2 */
> + u32 fcfg1; /* Flash Configuration Register 1 */
> + u32 fcfg2; /* Flash Configuration Register 2 */
> + u32 uidh; /* Unique Identification Register High */
> + u32 uidmh; /* Unique Identification Register Mid-High */
> + u32 uidml; /* Unique Identification Register Mid Low */
> + u32 uidl; /* Unique Identification Register Low */
> + u32 clkdiv3; /* System Clock Divider Register 3 */
> + u32 clkdiv4; /* System Clock Divider Register 4 */
> + u32 mcr; /* Misc Control Register */
> +};
Move it into the driver that uses these.
> +/*
> + * SIM registers base
> + */
> +#define KINETIS_SIM_BASE (KINETIS_AIPS0PERIPH_BASE + 0x00047000)
> +#define KINETIS_SIM_PTR(reg) \
> + (&(((struct kinetis_sim_regs *)(KINETIS_SIM_BASE))->reg))
> +#define KINETIS_SIM_RD(reg) readl_relaxed(KINETIS_SIM_PTR(reg))
> +#define KINETIS_SIM_WR(reg, val) writel_relaxed((val), KINETIS_SIM_PTR(reg))
> +#define KINETIS_SIM_SET(reg, mask) \
> + KINETIS_SIM_WR(reg, (KINETIS_SIM_RD(reg)) | (mask))
> +#define KINETIS_SIM_RESET(reg, mask) \
> + KINETIS_SIM_WR(reg, (KINETIS_SIM_RD(reg)) & (~(mask)))
> +#define KINETIS_SIM_ISSET(reg, mask) \
> + (KINETIS_SIM_RD(reg) & (mask))
> +
> +/*
> + * SIM registers
> + */
> +/*
> + * System Options Register 2
> + */
> +/* USB HS clock source select */
> +#define KINETIS_SIM_SOPT2_USBHSRC_BITS 2
> +#define KINETIS_SIM_SOPT2_USBHSRC_MSK (3 << KINETIS_SIM_SOPT2_USBHSRC_BITS)
> +#define KINETIS_SIM_SOPT2_USBHSRC_PLL0 (1 << KINETIS_SIM_SOPT2_USBHSRC_BITS)
> +#define KINETIS_SIM_SOPT2_USBHSRC_PLL1 (2 << KINETIS_SIM_SOPT2_USBHSRC_BITS)
> +
> +/* USB FS clock source select */
> +#define KINETIS_SIM_SOPT2_USBFSRC_BITS 22
> +#define KINETIS_SIM_SOPT2_USBFSRC_MSK (3 << KINETIS_SIM_SOPT2_USBFSRC_BITS)
> +#define KINETIS_SIM_SOPT2_USBFSRC_PLL0 (1 << KINETIS_SIM_SOPT2_USBFSRC_BITS)
> +#define KINETIS_SIM_SOPT2_USBFSRC_PLL1 (2 << KINETIS_SIM_SOPT2_USBFSRC_BITS)
> +#define KINETIS_SIM_SOPT2_USBF_CLKSEL (1 << 18)
> +
remove all these here.
> +/*
> + * Map required regions.
> + * This being the no-MMU Linux, I am not mapping anything
> + * since all I/O registers are available at their physical addresses.
> + */
> +static void __init kinetis_map_io(void)
> +{
> +}
Not needed, remove.
> +/*
> + * Freescale Kinetis platform initialization
> + */
> +static void __init kinetis_init(void)
> +{
> + of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
> +}
same here.
> diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
> index 2ed1b8a..1d05516 100644
> --- a/arch/arm/tools/mach-types
> +++ b/arch/arm/tools/mach-types
> @@ -554,6 +554,7 @@ smdk4412 MACH_SMDK4412 SMDK4412 3765
> marzen MACH_MARZEN MARZEN 3790
> krome MACH_KROME KROME 3797
> armadillo800eva MACH_ARMADILLO800EVA ARMADILLO800EVA 3863
> +kinetis MACH_KINETIS KINETIS 3896
> mx53_umobo MACH_MX53_UMOBO MX53_UMOBO 3927
> mt4 MACH_MT4 MT4 3981
> u8520 MACH_U8520 U8520 3990
Unused, please remove.
Arnd
next prev parent reply other threads:[~2015-06-23 22:05 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-23 21:19 [PATCH 0/9] [New BSP] Add initial support for Freescale Kinetis TWR-K70F120M development kit Paul Osmialowski
[not found] ` <1435094387-20146-1-git-send-email-pawelo-rhuoMcPwk82rDJvtcaxF/A@public.gmane.org>
2015-06-23 21:19 ` [PATCH 1/9] arm: select different compiler flags for ARM CortexM3 Paul Osmialowski
2015-06-23 21:19 ` [PATCH 2/9] arm: do not place huge encoder tables on stack when it is too small Paul Osmialowski
2015-06-23 21:19 ` [PATCH 3/9] arm: add call to CPU idle quirks handler Paul Osmialowski
2015-06-23 21:19 ` [PATCH 4/9] arm: allow copying of vector table to internal SRAM memory Paul Osmialowski
2015-06-23 21:19 ` [PATCH 5/9] arm: twr-k70f120m: basic support for Kinetis TWR-K70F120M Paul Osmialowski
2015-06-23 22:05 ` Arnd Bergmann [this message]
2015-06-23 22:33 ` Russell King - ARM Linux
2015-06-24 4:42 ` Paul Osmialowski
2015-06-23 21:19 ` [PATCH 6/9] arm: twr-k70f120m: clock source drivers for Kinetis SoC Paul Osmialowski
2015-06-23 21:19 ` [PATCH 7/9] arm: twr-k70f120m: IOMUX driver " Paul Osmialowski
2015-06-23 21:19 ` [PATCH 8/9] arm: twr-k70f120m: extend Freescale eDMA driver with ability to support " Paul Osmialowski
[not found] ` <1435094387-20146-9-git-send-email-pawelo-rhuoMcPwk82rDJvtcaxF/A@public.gmane.org>
2015-06-24 16:14 ` Vinod Koul
2015-06-24 17:43 ` Paul Osmialowski
2015-06-23 21:19 ` [PATCH 9/9] arm: twr-k70f120m: extend Freescale lpuart " Paul Osmialowski
2015-06-23 21:19 ` [PATCH 1/9] arm: select different compiler flags for ARM CortexM3 Paul Osmialowski
2015-06-23 21:19 ` [PATCH 2/9] arm: do not place huge encoder tables on stack when it is too small Paul Osmialowski
2015-06-24 7:10 ` Geert Uytterhoeven
2015-06-24 7:17 ` Paul Osmialowski
2015-06-23 21:19 ` [PATCH 3/9] arm: add call to CPU idle quirks handler Paul Osmialowski
2015-06-23 21:59 ` Arnd Bergmann
2015-06-25 16:42 ` Nicolas Pitre
[not found] ` <alpine.LFD.2.11.1506251237000.2617-fMhRO7WWcppj+hNMo8g0rg@public.gmane.org>
2015-06-26 5:30 ` Paul Osmialowski
2015-06-26 7:40 ` Arnd Bergmann
2015-06-26 21:52 ` Paul Osmialowski
[not found] ` <alpine.LNX.2.00.1506262324230.5744-bi+AKbBUZKY6gyzm1THtWbp2dZbC/Bob@public.gmane.org>
2015-06-26 22:27 ` Russell King - ARM Linux
2015-06-23 21:19 ` [PATCH 4/9] arm: allow copying of vector table to internal SRAM memory Paul Osmialowski
2015-06-23 21:19 ` [PATCH 6/9] arm: twr-k70f120m: clock source drivers for Kinetis SoC Paul Osmialowski
[not found] ` <1435094387-20146-7-git-send-email-pawelo-rhuoMcPwk82rDJvtcaxF/A@public.gmane.org>
2015-06-23 22:24 ` Stephen Boyd
2015-06-24 5:09 ` Paul Osmialowski
2015-06-23 22:25 ` Arnd Bergmann
2015-06-24 7:53 ` Thomas Gleixner
2015-06-23 21:19 ` [PATCH 7/9] arm: twr-k70f120m: IOMUX driver " Paul Osmialowski
2015-06-24 10:21 ` Paul Bolle
2015-06-24 17:44 ` Paul Osmialowski
[not found] ` <1435094387-20146-8-git-send-email-pawelo-rhuoMcPwk82rDJvtcaxF/A@public.gmane.org>
2015-06-24 10:21 ` Paul Bolle
2015-07-14 8:53 ` Linus Walleij
2015-09-08 8:04 ` Paul Osmialowski
2015-09-08 14:28 ` Linus Walleij
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