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Wysocki" , Kevin Hilman , Florian Fainelli , Wolfram Sang , Marek Vasut , Kuninori Morimoto Cc: arm-scmi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org References: <053c312d07445517d8f9c84bfe3cc8fb72d4cd9a.1776793163.git.geert+renesas@glider.be> Content-Language: en-US From: Marek Vasut In-Reply-To: <053c312d07445517d8f9c84bfe3cc8fb72d4cd9a.1776793163.git.geert+renesas@glider.be> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-MBO-RS-ID: 2cc6b046b50a6ef62f4 X-MBO-RS-META: shaqte9razzqy9pddg5m6mj3cujbz7ph X-Rspamd-Queue-Id: 4gBQxT5l6Rz9twx On 4/21/26 8:11 PM, Geert Uytterhoeven wrote: [...] > + '#power-domain-cells': > + description: | > + - The first power domain specifier cell must be either the Module > + Power Domain Gating (MPDG) register index (0x00-0x3f) from the > + datasheet, or a Power Domain number, as defined in > + , > + - The second power domain specifier cell must be the module number > + (0x00-0xff), composed of the Module System Reset (MSRES) register index > + in the high nibble, and the Module Reset Destination bitfield index in > + the low nibble. > + const: 2 > + > + '#reset-cells': > + description: > + The single reset specifier cell must be the module number (0x00-0xff). > + const: 1 Just one more question -- the power-domain-cells second cell and reset-cells are always going to be identical values, correct ? If so, it would be nice to keep the description: aligned, and maybe even indicate in the description that those two values have to be the same.