From mboxrd@z Thu Jan  1 00:00:00 1970
From: Martin Sperl <kernel@martin.sperl.org>
Subject: Re: [PATCH 2/5] clk: bcm2835: enable management of PCM clock
Date: Sun, 10 Jan 2016 13:17:17 +0100
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> On 10.01.2016, at 12:58, Mark Brown <broonie@kernel.org> wrote:
>=20
> On Sun, Jan 10, 2016 at 11:55:48AM +0100, Martin Sperl wrote:
>=20
>> So if someone with a better idea how to keep those dt-binding includ=
es
>> synchronized with the definitions used by the code step forward and
>> propose a better solution how to get that implemented?
>=20
>> I guess there will be a few more occurrences of clocks that are
>> currently not defined, which will need to get introduced in the futu=
re
>> PWM and PCM were just the last in this series.
>=20
> Presumably just making the code not rely on having a define for the
> number of clocks would deal with the problem (eg, using ARRAY_SIZE
> internally).
ARRAY_SIZE would work fine, but the code is:=20

#include <dt-bindings/clock/bcm2835.h>
=2E..
struct bcm2835_cprman {
	struct device *dev;
	void __iomem *regs;
	spinlock_t regs_lock;
	const char *osc_name;

	struct clk_onecell_data onecell;
	struct clk *clks[BCM2835_CLOCK_COUNT];
};
=2E..
static int bcm2835_clk_probe(struct platform_device *pdev)
{
=2E..
	clks[BCM2835_PLLA_CORE] =3D
		bcm2835_register_pll_divider(cprman, &bcm2835_plla_core_data);
=2E..
        clks[BCM2835_CLOCK_PCM] =3D
                bcm2835_register_clock(cprman, &bcm2835_clock_pcm_data)=
;
=2E..
}

So the Array size is defined by the dt-bindings.

What you propose is a major change to the clock framework, so I would
hope that Eric (the original author of this clock-driver) would address
it.

Maybe someone has a better idea for a pattern to use to achieve=20
the required while maintaining =E2=80=9Csynchronization=E2=80=9D betwee=
n defines
inside the dt-binding and the driver.