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Tue, 22 Oct 2024 11:05:00 +0200 (CEST) Message-ID: <3a550c82-7099-4544-bdff-e1ea411b1636@collabora.com> Date: Tue, 22 Oct 2024 11:04:59 +0200 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/2] dt-bindings: clock: mediatek: Add bindings for MT6735 syscon clock and reset controllers To: Yassine Oudjana , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , Philipp Zabel , Lukas Bulwahn , Daniel Golle , Sam Shih Cc: Yassine Oudjana , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org References: <20241021121618.151079-1-y.oudjana@protonmail.com> <20241021121618.151079-2-y.oudjana@protonmail.com> From: AngeloGioacchino Del Regno Content-Language: en-US In-Reply-To: <20241021121618.151079-2-y.oudjana@protonmail.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Il 21/10/24 14:16, Yassine Oudjana ha scritto: > From: Yassine Oudjana > > Add device tree bindings for syscon clock and reset controllers (IMGSYS, > MFGCFG, VDECSYS and VENCSYS). > > Signed-off-by: Yassine Oudjana > --- > .../bindings/clock/mediatek,syscon.yaml | 4 ++++ > MAINTAINERS | 6 ++++++ > .../dt-bindings/clock/mediatek,mt6735-imgsys.h | 15 +++++++++++++++ > .../dt-bindings/clock/mediatek,mt6735-mfgcfg.h | 8 ++++++++ > .../dt-bindings/clock/mediatek,mt6735-vdecsys.h | 9 +++++++++ > .../dt-bindings/clock/mediatek,mt6735-vencsys.h | 11 +++++++++++ > .../dt-bindings/reset/mediatek,mt6735-mfgcfg.h | 9 +++++++++ > .../dt-bindings/reset/mediatek,mt6735-vdecsys.h | 10 ++++++++++ > 8 files changed, 72 insertions(+) > create mode 100644 include/dt-bindings/clock/mediatek,mt6735-imgsys.h > create mode 100644 include/dt-bindings/clock/mediatek,mt6735-mfgcfg.h > create mode 100644 include/dt-bindings/clock/mediatek,mt6735-vdecsys.h > create mode 100644 include/dt-bindings/clock/mediatek,mt6735-vencsys.h > create mode 100644 include/dt-bindings/reset/mediatek,mt6735-mfgcfg.h > create mode 100644 include/dt-bindings/reset/mediatek,mt6735-vdecsys.h > ..snip.. > diff --git a/include/dt-bindings/reset/mediatek,mt6735-vdecsys.h b/include/dt-bindings/reset/mediatek,mt6735-vdecsys.h > new file mode 100644 > index 0000000000000..90ad73af50a3f > --- /dev/null > +++ b/include/dt-bindings/reset/mediatek,mt6735-vdecsys.h > @@ -0,0 +1,10 @@ > +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ > + > +#ifndef _DT_BINDINGS_RESET_MT6735_VDECSYS_H > +#define _DT_BINDINGS_RESET_MT6735_VDECSYS_H > + > +#define MT6735_VDEC_RST0_VDEC 0 > + Since you anyway have to send a new version, please remove this extra and unneeded blank line for v2. Anyway... Reviewed-by: AngeloGioacchino Del Regno