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From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Xiangsheng Hou <xiangsheng.hou@mediatek.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Mark Brown <broonie@kernel.org>,
	Chuanhong Guo <gch981213@gmail.com>
Cc: linux-mtd@lists.infradead.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org,
	linux-spi@vger.kernel.org, benliang.zhao@mediatek.com,
	bin.zhang@mediatek.com
Subject: Re: [PATCH v2 8/9] dt-bindings: mtd: Split ECC engine with rawnand controller
Date: Mon, 5 Dec 2022 10:21:59 +0100	[thread overview]
Message-ID: <3a9b5a27-e18f-226b-065b-f09c568b4d85@linaro.org> (raw)
In-Reply-To: <20221205065756.26875-9-xiangsheng.hou@mediatek.com>

On 05/12/2022 07:57, Xiangsheng Hou wrote:
> 1. Split MediaTek ECC engine with rawnand controller and convert to
> YAML schema.
> 2. Change the existing node name in order to match NAND controller DT
> bindings.

One patch - one logical change. Not two. This applies to all your
patches, so whenever you want to enumerate, please think twice.

> 
> Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
> ---
>  .../bindings/mtd/mediatek,mtk-nfc.yaml        | 171 +++++++++++++++++
>  .../mtd/mediatek,nand-ecc-engine.yaml         |  62 ++++++
>  .../devicetree/bindings/mtd/mtk-nand.txt      | 176 ------------------
>  arch/arm/boot/dts/mt2701.dtsi                 |   2 +-
>  arch/arm64/boot/dts/mediatek/mt2712e.dtsi     |   2 +-
>  arch/arm64/boot/dts/mediatek/mt7622.dtsi      |   2 +-

Do not combine bindings and DTS.

>  6 files changed, 236 insertions(+), 179 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/mtd/mediatek,mtk-nfc.yaml
>  create mode 100644 Documentation/devicetree/bindings/mtd/mediatek,nand-ecc-engine.yaml
>  delete mode 100644 Documentation/devicetree/bindings/mtd/mtk-nand.txt
> 
> diff --git a/Documentation/devicetree/bindings/mtd/mediatek,mtk-nfc.yaml b/Documentation/devicetree/bindings/mtd/mediatek,mtk-nfc.yaml
> new file mode 100644
> index 000000000000..2b1c92edc9d0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mtd/mediatek,mtk-nfc.yaml
> @@ -0,0 +1,171 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/mtd/mediatek,mtk-nfc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MediaTek(MTK) SoCs raw NAND FLASH controller (NFC)
> +
> +maintainers:
> +  - Xiangsheng Hou <xiangsheng.hou@mediatek.com>
> +
> +properties:
> +  compatible:
> +    enum:
> +      - mediatek,mt2701-nfc
> +      - mediatek,mt2712-nfc
> +      - mediatek,mt7622-nfc
> +
> +  reg:
> +    items:
> +      - description: Base physical address and size of NFI.
> +
> +  interrupts:
> +    items:
> +      - description: NFI interrupt
> +
> +  clocks:
> +    items:
> +      - description: clock used for the controller
> +      - description: clock used for the pad
> +
> +  clock-names:
> +    items:
> +      - const: nfi_clk
> +      - const: pad_clk
> +
> +  ecc-engine: true

I don't think this could be anything. You need to describe it, so $ref
and description.

> +
> +  partitions:
> +    $ref: mtd.yaml#

How the partitions are MTD device? Open that file and see how it should
be defined... Anyway mtd.yaml is part of nand-chip, not nand-controller.

> +
> +allOf:
> +  - $ref: nand-controller.yaml#
> +
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: mediatek,mt2701-nfc
> +    then:
> +      patternProperties:
> +        "^nand@[a-f0-9]$":
> +          type: object

No need for type, the definition is already there through
nand-controller.yaml.

> +          properties:
> +            reg:
> +              minimum: 0
> +              maximum: 1

This is the same as other variant, so should be defined in top-level
pattern properties.

> +            nand-ecc-mode:
> +              const: hw

Ditto

> +            nand-ecc-step-size:
> +              enum: [ 512, 1024 ]> +            nand-ecc-strength:
> +              enum: [4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 28, 32, 36,
> +                     40, 44, 48, 52, 56, 60]
> +
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: mediatek,mt2712-nfc
> +    then:
> +      patternProperties:
> +        "^nand@[a-f0-9]$":
> +          type: object
> +          properties:
> +            reg:
> +              minimum: 0
> +              maximum: 1
> +            nand-ecc-mode:
> +              const: hw
> +            nand-ecc-step-size:
> +              enum: [ 512, 1024 ]
> +            nand-ecc-strength:
> +              enum: [4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 28, 32, 36,
> +                     40, 44, 48, 52, 56, 60, 68, 72, 80]
> +
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: mediatek,mt7622-nfc
> +    then:
> +      patternProperties:
> +        "^nand@[a-f0-9]$":
> +          type: object
> +          properties:
> +            reg:
> +              minimum: 0
> +              maximum: 1
> +            nand-ecc-mode:
> +              const: hw
> +            nand-ecc-step-size:
> +              const: 512
> +            nand-ecc-strength:
> +              enum: [4, 6, 8, 10, 12]
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +  - clocks
> +  - clock-names
> +  - ecc-engine
> +
> +unevaluatedProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/clock/mt2701-clk.h>
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +    #include <dt-bindings/interrupt-controller/irq.h>
> +
> +    soc {
> +        #address-cells = <2>;
> +        #size-cells = <2>;
> +
> +        nand-controller@1100d000 {
> +            compatible = "mediatek,mt2701-nfc";
> +            reg = <0 0x1100d000 0 0x1000>;
> +            interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_LOW>;
> +            clocks = <&pericfg CLK_PERI_NFI>,
> +                     <&pericfg CLK_PERI_NFI_PAD>;
> +            clock-names = "nfi_clk", "pad_clk";
> +            ecc-engine = <&bch>;
> +            #address-cells = <1>;
> +            #size-cells = <0>;
> +
> +            nand@0 {
> +                reg = <0>;
> +
> +                nand-on-flash-bbt;
> +                nand-ecc-mode = "hw";
> +                nand-ecc-step-size = <1024>;
> +                nand-ecc-strength = <24>;
> +
> +                partitions {
> +                    compatible = "fixed-partitions";
> +                    #address-cells = <1>;
> +                    #size-cells = <1>;
> +
> +                    preloader@0 {
> +                        label = "pl";
> +                        read-only;
> +                        reg = <0x0 0x400000>;
> +                    };
> +                    android@400000 {
> +                        label = "android";
> +                        reg = <0x400000 0x12c00000>;
> +                    };
> +                };
> +            };
> +        };
> +
> +        bch: ecc@1100e000 {
> +            compatible = "mediatek,mt2701-ecc";
> +            reg = <0 0x1100e000 0 0x1000>;
> +            interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_LOW>;
> +            clocks = <&pericfg CLK_PERI_NFI_ECC>;
> +            clock-names = "nfiecc_clk";

You already have example of ecc in other binding, so drop from this one.

> +        };
> +    };
> diff --git a/Documentation/devicetree/bindings/mtd/mediatek,nand-ecc-engine.yaml b/Documentation/devicetree/bindings/mtd/mediatek,nand-ecc-engine.yaml
> new file mode 100644
> index 000000000000..b13d801eda76
> --- /dev/null


Best regards,
Krzysztof


  reply	other threads:[~2022-12-05  9:22 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-05  6:57 [PATCH v2 0/9] Add MediaTek MT7986 SPI NAND and ECC support Xiangsheng Hou
2022-12-05  6:57 ` [PATCH v2 1/9] spi: mtk-snfi: Add snfi support for MT7986 IC Xiangsheng Hou
2022-12-05 14:21   ` AngeloGioacchino Del Regno
2022-12-05  6:57 ` [PATCH v2 2/9] spi: mtk-snfi: Change default page format to setup default setting Xiangsheng Hou
2022-12-05  6:57 ` [PATCH v2 3/9] spi: mtk-snfi: Add optional nfi_hclk which needed for MT7986 Xiangsheng Hou
2022-12-05 14:21   ` AngeloGioacchino Del Regno
2022-12-07  1:42     ` Xiangsheng Hou (侯祥胜)
2022-12-07 10:08       ` AngeloGioacchino Del Regno
2022-12-05  6:57 ` [PATCH v2 4/9] mtd: nand: ecc-mtk: Add ECC support fot MT7986 IC Xiangsheng Hou
2022-12-05 14:21   ` AngeloGioacchino Del Regno
2022-12-06  9:04     ` Xiangsheng Hou (侯祥胜)
2022-12-06 12:22       ` AngeloGioacchino Del Regno
2022-12-07  2:01         ` Xiangsheng Hou (侯祥胜)
2022-12-05  6:57 ` [PATCH v2 5/9] dt-bindings: spi: mtk-snfi: Add compatible for MT7986 Xiangsheng Hou
2022-12-05  9:05   ` Krzysztof Kozlowski
2022-12-05  6:57 ` [PATCH v2 6/9] spi: mtk-snfi: Add snfi sample delay and read latency adjustment Xiangsheng Hou
2022-12-05 14:21   ` AngeloGioacchino Del Regno
2022-12-05  6:57 ` [PATCH v2 7/9] dt-bindings: spi: mtk-snfi: Add read latch latency property Xiangsheng Hou
2022-12-05  9:06   ` Krzysztof Kozlowski
2022-12-05 14:21   ` AngeloGioacchino Del Regno
2022-12-06  9:04     ` Xiangsheng Hou (侯祥胜)
2022-12-06 12:19       ` AngeloGioacchino Del Regno
2022-12-07  2:00         ` Xiangsheng Hou (侯祥胜)
2022-12-07  9:48           ` AngeloGioacchino Del Regno
2022-12-08  1:15             ` Xiangsheng Hou (侯祥胜)
2022-12-08  8:46               ` Krzysztof Kozlowski
2022-12-05  6:57 ` [PATCH v2 8/9] dt-bindings: mtd: Split ECC engine with rawnand controller Xiangsheng Hou
2022-12-05  9:21   ` Krzysztof Kozlowski [this message]
2022-12-06  9:05     ` Xiangsheng Hou (侯祥胜)
2022-12-05  6:57 ` [PATCH v2 9/9] dt-bindings: mtd: ecc-mtk: Add compatible for MT7986 Xiangsheng Hou
2022-12-05  9:22   ` Krzysztof Kozlowski
2022-12-06 16:04 ` (subset) [PATCH v2 0/9] Add MediaTek MT7986 SPI NAND and ECC support Mark Brown

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