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Thu, 08 Oct 2026 04:42:42 -0700 (PDT) X-Received: by 2002:a05:693c:630c:b0:351:d38e:6c0a with SMTP id 5a478bee46e88-351d38e6d5cmr2228565eec.0.1791459761768; Thu, 08 Oct 2026 04:42:41 -0700 (PDT) Received: from [10.217.216.239] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-3515aeb6076sm17870481eec.9.2026.10.08.04.42.36 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 08 Oct 2026 04:42:41 -0700 (PDT) Message-ID: <3aa2f7ba-734a-4d50-9eb4-cb7322449919@oss.qualcomm.com> Date: Thu, 8 Oct 2026 17:12:34 +0530 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/4] dt-bindings: arm: ras: Introduce bindings for ARM RAS error sources To: Rob Herring Cc: Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Ruidong Tian , Tony Luck , Borislav Petkov , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-edac@vger.kernel.org, faruque.ansari@oss.qualcomm.com, avaneesh.dwivedi@oss.qualcomm.com References: <20260720081954.1858180-1-umang.chheda@oss.qualcomm.com> <20260720081954.1858180-2-umang.chheda@oss.qualcomm.com> <20260731203515.GA1619665-robh@kernel.org> Content-Language: en-US From: Umang Chheda In-Reply-To: <20260731203515.GA1619665-robh@kernel.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=AbMkjHXG c=1 sm=1 tr=0 ts=6ac781b3 cx=c_pps a=cFYjgdjTJScbgFmBucgdfQ==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=txCGJbmANruv-OSAE2cA:9 a=QEXdDO2ut3YA:10 a=scEy_gLbYbu1JhEsrz4S:22 X-Proofpoint-GUID: 8Hfg6XxAm8OH1TvuZmLq9d8HURJuJlsE X-Proofpoint-ORIG-GUID: 8Hfg6XxAm8OH1TvuZmLq9d8HURJuJlsE X-Proofpoint-Spam-Info: AW1haW4tMjYxMDA4MDA0NiBTYWx0ZWRfX7OHFVHTIQUFu c8tdGMQh0GoN7s/VaCjumKXVf78OAywEnOU7wbApPX7FSMoPqgGP7XLSFULuLjeI1N6oIWfOdY0 zGxfYg3p1hk1xmJHLewLLRKDrbR1CEI= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDA4MDA0NiBTYWx0ZWRfX3AJ/stTbUPdf 7F7sZsAHTS7wKbFyLiZ+j744lGKU64HuAlkahnBGAqA0m8SeA3yFtS5e2b4dzxHrigH5f3TwOgQ qlXXW1M3rHU+VE6bP6CaOjiJ+D3C7g9b2+IY/CUtrhS/2ySiJDhgsTGWl84yFbIJq8uoLeShz4r 6nzFz5swkheW+1cac7c+L/VWMkLAoZPatCajfEeu/ZUjbzYKhncOpkoF8AP5/ReYVNQAkclATwU hvvRFlyoEweeDVvA+srutEx3qtufm2YmqWHq7FsYy5jz7HnPgzOMK2XrMocplqZk7SkM3FrUs2s kIiKjeM5j7RgfiPQm7RTMEZwF2kSHtcMvtNTpS2vBxTzufypLkCsJnQ5SFcEuAO/QrfutQOzpDP z1RJoNN9lxwY78W8/Ado0Ch36tOE428AnqWzf0vwZ3PCJ5u1AzKuda3+G9xpAY7QR7QDwJx3T0L kmmmxzKx1sr6sfDRvzQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-08_04,2026-10-08_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 clxscore=1015 suspectscore=0 lowpriorityscore=0 spamscore=0 impostorscore=0 malwarescore=0 adultscore=0 phishscore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610020000 definitions=main-2610080046 Hello Rob, Krzysztof, On 8/1/2026 2:05 AM, Rob Herring wrote: > On Mon, Jul 20, 2026 at 01:49:51PM +0530, Umang Chheda wrote: >> ARMv8 and later processors implement the RAS (Reliability, >> Availability and Serviceability) extensions, exposing hardware >> error records through a standardised register interface. >> >> Add Device Tree bindings to describe RAS error sources. >> >> Signed-off-by: Umang Chheda >> --- >> .../bindings/arm/arm,ras-error-source.yaml | 330 ++++++++++++++++++ >> include/dt-bindings/arm/arm-ras.h | 11 + >> 2 files changed, 341 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/arm/arm,ras-error-source.yaml >> create mode 100644 include/dt-bindings/arm/arm-ras.h >> [...] Thanks for reviewing dt-bindings change of v2 of this patch series - I have address all the comments and posted v3 [1]. [1] https://lore.kernel.org/all/20260918095746.3347893-2-umang.chheda@oss.qualcomm.com/ Thanks, Umang