From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 78D87C64ED6 for ; Mon, 27 Feb 2023 09:07:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229691AbjB0JHd (ORCPT ); Mon, 27 Feb 2023 04:07:33 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40492 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229697AbjB0JHQ (ORCPT ); Mon, 27 Feb 2023 04:07:16 -0500 Received: from mail-ed1-x529.google.com (mail-ed1-x529.google.com [IPv6:2a00:1450:4864:20::529]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5D3D02596E for ; Mon, 27 Feb 2023 00:58:17 -0800 (PST) Received: by mail-ed1-x529.google.com with SMTP id ee7so22711270edb.2 for ; Mon, 27 Feb 2023 00:58:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1677488238; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=pl3dkRXMmAk1JBFimIqhpxnC6XsfsDXMDQ44PxTCQ/s=; b=P7PCysNyGXBUHF2SEK3a2GC2Jh9F51OKcEN6X92KfvfaGf0iLrVCaR6qf6uLk0g6De vbLNFRTKcg7N0fA3xgqqUiZDnbKp1C8L7vfwY36vZekzMKq8DGY2n0tg1bP4C2PQrArB c3bG3XBn03CYvSsY73skxsZ71O+0xAQdY3CpHphBEKGKyD1ErqkVYq/xnVThIgOCeOfZ OxG6uQSGWiq1j36h3SKHSSwBvqQjAqC3t3PD51+4zzUpAvlvfXxSVpePimPGdNBxQaAc yVxol1vvk67ZY8+QUmv6P+ZlOalCTL/uuzRUNM1+eAdX40EPL7ai7w89gBEiqqPdcmZR CaIw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1677488238; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=pl3dkRXMmAk1JBFimIqhpxnC6XsfsDXMDQ44PxTCQ/s=; b=cSYwI3QPbWrQvyQ3OdOKqDBUf9fnGjZeY6e4k3FHBJnNB5yghPxIxZzi5e9MEPz95U mjLKLhJkIT801MwpnjNCk9w7EogBz/0snVONqQjXFNbFmbUUBhTxk6Z6poHFt7/WDNu9 wBj6uRvlOjI7TKFjUXIrp2rve2a/T5XODkYJ+nXEDTn+cwBODv4d+HyOWASqa+NHX2iT dcNUqvfnYUmBOYwie/Fc+cbZ1t77aqIsfbRV0jot+/JD75+nilptWOTt37zqZVFTMoWG DaoGmz6GaTuY9x541vqXgFNB3QaLTH6crGi1Weq7SENCox4prqfljbZZ30HBW51G+czE edlw== X-Gm-Message-State: AO0yUKUfIgVhw01PDijbDAVjCNHdiytZ4B1BhcNyZbJoEK7a3qwXcomn 79S1mZ5jL+GE4vHn9XrRWTmVj+jIyxKJ7//2 X-Google-Smtp-Source: AK7set/Gvtsf5P7zOB+MC4cBLFFsUoGA6x+8HxOLVIaK3IY1MS+lDHx3oVzZik2heawiFH8nJ7qjMg== X-Received: by 2002:a05:651c:2228:b0:295:9c2e:7324 with SMTP id y40-20020a05651c222800b002959c2e7324mr7173325ljq.4.1677487397220; Mon, 27 Feb 2023 00:43:17 -0800 (PST) Received: from [192.168.1.101] (abym99.neoplus.adsl.tpnet.pl. [83.9.32.99]) by smtp.gmail.com with ESMTPSA id i2-20020a05651c120200b002935305ff4asm643079lja.82.2023.02.27.00.43.16 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 27 Feb 2023 00:43:16 -0800 (PST) Message-ID: <3aa78b15-8e6c-9657-0d08-0d0452d51fbe@linaro.org> Date: Mon, 27 Feb 2023 09:43:15 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.8.0 Subject: Re: [PATCH v2 1/6] dt-bindings: arm-smmu: Use qcom,smmu compatible for MMU500 adreno SMMUs To: Rob Herring Cc: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, marijn.suijten@somainline.org, Will Deacon , Robin Murphy , Joerg Roedel , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20230217111613.306978-1-konrad.dybcio@linaro.org> <20230226173706.GA60188-robh@kernel.org> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20230226173706.GA60188-robh@kernel.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 26.02.2023 18:37, Rob Herring wrote: > On Fri, Feb 17, 2023 at 12:16:08PM +0100, Konrad Dybcio wrote: >> qcom,smmu-500 was introduced to prevent people from adding new >> compatibles for what seems to roughly be the same hardware. Use it for >> qcom,adreno-smmu-compatible targets as well. >> >> Signed-off-by: Konrad Dybcio >> --- >> v1 -> v2: >> - Add this patch, omitted previously (big oops) >> >> .../devicetree/bindings/iommu/arm,smmu.yaml | 14 ++++++++++++-- >> 1 file changed, 12 insertions(+), 2 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml >> index 807cb511fe18..4d7f61700cae 100644 >> --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml >> +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml >> @@ -75,9 +75,19 @@ properties: >> - qcom,sm8350-smmu-500 >> - qcom,sm8450-smmu-500 >> - const: arm,mmu-500 >> - >> - - description: Qcom Adreno GPUs implementing "arm,smmu-500" >> + - description: Qcom Adreno GPUs implementing "qcom,smmu-500" and "arm,smmu-500" >> + items: >> + - enum: >> + - qcom,sc7280-smmu-500 >> + - qcom,sm8150-smmu-500 >> + - qcom,sm8250-smmu-500 >> + - const: qcom,adreno-smmu >> + - const: qcom,smmu-500 >> + - const: arm,mmu-500 > > 4 compatibles seems excessive. Is adding one that helpful? Is > 'arm,mmu-500' useful on its own? Yes. per-soc compatible is there for per-soc quirks should there be any qcom,adreno-smmu enabled per-process pagetables qcom,smmu-500 matches the qcom smmu implementation arm,mmu-500 matches the smmu driver as a whole > >> + - description: Qcom Adreno GPUs implementing "arm,smmu-500" (legacy binding) > > Perhaps fix the existing typo: arm,mmu-500 Ack Konrad > >> + deprecated: true >> items: >> + # Do not add additional SoC to this list. Instead use previous list. >> - enum: >> - qcom,sc7280-smmu-500 >> - qcom,sm8150-smmu-500 >> -- >> 2.39.1 >>