From: Dmitry Osipenko <digetx@gmail.com>
To: Rob Herring <robh@kernel.org>
Cc: Thierry Reding <thierry.reding@gmail.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
Peter De Schrijver <pdeschrijver@nvidia.com>,
Prashant Gaikwad <pgaikwad@nvidia.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
linux-tegra@vger.kernel.org, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v4 7/7] dt-bindings: clock: tegra: Convert to schema
Date: Mon, 15 Mar 2021 22:07:11 +0300 [thread overview]
Message-ID: <3aae4fb3-6b45-24ea-df2d-63746ec2afda@gmail.com> (raw)
In-Reply-To: <20210315155310.GA926230@robh.at.kernel.org>
15.03.2021 18:53, Rob Herring пишет:
> On Fri, Mar 12, 2021 at 07:36:32PM +0300, Dmitry Osipenko wrote:
>> Convert NVIDIA Tegra clock bindings to schema.
>>
>> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
>> ---
>> .../bindings/clock/nvidia,tegra-car.yaml | 118 ++++++++++++++++++
>> .../bindings/clock/nvidia,tegra114-car.txt | 63 ----------
>> .../bindings/clock/nvidia,tegra124-car.txt | 107 ----------------
>
> Seems like this one is a bit different and should remain a separate
> binding?
The T124 binding has optional EMC (external memory controller) clocks
that aren't used by other SoCs. The T124 also shouldn't need these
clocks, but that's how the binding happened to be defined historically.
Since the optional properties have no effect on a non-T124 SoCs, I
thought that it should be better to unify all the bindings, rather than
partially duplicate them with out any real benefit.
prev parent reply other threads:[~2021-03-15 19:08 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-12 16:36 [PATCH v4 0/7] Couple improvements for Tegra clk driver Dmitry Osipenko
2021-03-12 16:36 ` [PATCH v4 1/7] clk: tegra30: Use 300MHz for video decoder by default Dmitry Osipenko
2021-03-12 16:36 ` [PATCH v4 2/7] clk: tegra: Fix refcounting of gate clocks Dmitry Osipenko
2021-03-12 16:36 ` [PATCH v4 3/7] clk: tegra: Ensure that PLLU configuration is applied properly Dmitry Osipenko
2021-03-12 16:36 ` [PATCH v4 4/7] clk: tegra: Halve SCLK rate on Tegra20 Dmitry Osipenko
2021-03-12 16:36 ` [PATCH v4 5/7] MAINTAINERS: Hand Tegra clk driver to Jon and Thierry Dmitry Osipenko
2021-03-12 16:36 ` [PATCH v4 6/7] clk: tegra: Don't allow zero clock rate for PLLs Dmitry Osipenko
2021-03-12 16:36 ` [PATCH v4 7/7] dt-bindings: clock: tegra: Convert to schema Dmitry Osipenko
2021-03-15 14:22 ` Rob Herring
2021-03-15 15:53 ` Rob Herring
2021-03-15 19:07 ` Dmitry Osipenko [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=3aae4fb3-6b45-24ea-df2d-63746ec2afda@gmail.com \
--to=digetx@gmail.com \
--cc=devicetree@vger.kernel.org \
--cc=jonathanh@nvidia.com \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-tegra@vger.kernel.org \
--cc=mturquette@baylibre.com \
--cc=pdeschrijver@nvidia.com \
--cc=pgaikwad@nvidia.com \
--cc=robh@kernel.org \
--cc=sboyd@kernel.org \
--cc=thierry.reding@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).