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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ab384f223fesm1066630866b.105.2025.01.23.04.26.42 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 23 Jan 2025 04:26:44 -0800 (PST) Message-ID: <3b085773-bc6e-4d03-a9f0-8f8444bdbd45@oss.qualcomm.com> Date: Thu, 23 Jan 2025 13:26:41 +0100 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 7/7] arm64: dts: qcom: x1e80100: enable rtc To: Johan Hovold , Alexandre Belloni , Bjorn Andersson Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio , Jonathan Marek , linux-arm-msm@vger.kernel.org, linux-rtc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20250120144152.11949-1-johan+linaro@kernel.org> <20250120144152.11949-8-johan+linaro@kernel.org> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20250120144152.11949-8-johan+linaro@kernel.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: 2WBCd2etwsl1yLx93YkXjgS5L-LPiQFf X-Proofpoint-ORIG-GUID: 2WBCd2etwsl1yLx93YkXjgS5L-LPiQFf X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-01-23_05,2025-01-22_02,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 mlxscore=0 clxscore=1015 phishscore=0 bulkscore=0 mlxlogscore=720 impostorscore=0 priorityscore=1501 malwarescore=0 suspectscore=0 lowpriorityscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2501230095 On 20.01.2025 3:41 PM, Johan Hovold wrote: > On many Qualcomm platforms the PMIC RTC control and time registers are > read-only so that the RTC time can not be updated. Instead an offset > needs be stored in some machine-specific non-volatile memory, which a > driver can take into account. > > On X1E based Windows on Arm machines the offset is stored in a Qualcomm > specific UEFI variable. > > Unlike on previous platforms the alarm registers are also unaccessible > on X1E as they are owned by the ADSP. > > Assume all X1E machines use similar firmware and enable the RTC in the > PMIC dtsi for now. > > Based on a patch by Jonathan Marek. [1] > > Link: https://lore.kernel.org/r/20241015004945.3676-4-jonathan@marek.ca # [1] > Signed-off-by: Johan Hovold > --- Reviewed-by: Konrad Dybcio Konrad