From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A3CD7C4332F for ; Fri, 21 Oct 2022 13:44:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230349AbiJUNoY (ORCPT ); Fri, 21 Oct 2022 09:44:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55452 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230140AbiJUNoW (ORCPT ); Fri, 21 Oct 2022 09:44:22 -0400 Received: from mail-wr1-x42a.google.com (mail-wr1-x42a.google.com [IPv6:2a00:1450:4864:20::42a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 67D5CCFB for ; Fri, 21 Oct 2022 06:44:19 -0700 (PDT) Received: by mail-wr1-x42a.google.com with SMTP id u10so4956809wrq.2 for ; Fri, 21 Oct 2022 06:44:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:in-reply-to:organization:references:cc:to :content-language:subject:reply-to:from:user-agent:mime-version:date :message-id:from:to:cc:subject:date:message-id:reply-to; bh=/ZpaxMvmEuJPF3OgoDpXULb0R5XqV+uhtln4+RAmmd8=; b=HOny0ruFI9g5TTzJ5ZH5qvGL6+UqA9BmO6SUTjvo8lyGP84OduwmM3imoX5TfLfQpX ErIPWwPwtiBgh5+cGpZS4bF5gzGh7q4mp3WyPs05jgxYtWDaNdoTT/2RJl3Ma7kZkKeS NURZRhHE7c0nbQqwVRSImTCopAdiYUQdWHovO/cJNQtOmeviI63EKOhJFOiZz4XPq8hT L5tlfCsV4MNt4gIcoW+NcpqdQMjlmMK/cDQ2SgL+L4FmTvmOtkw9MoR5doYjmgnTSB7W l+mBUrZgtjW38JdnhIB4wA/uCMpvxiW68VCkV/I/cmccE3nItp3GMRryTteLFGrfPvP1 yt3Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:in-reply-to:organization:references:cc:to :content-language:subject:reply-to:from:user-agent:mime-version:date :message-id:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=/ZpaxMvmEuJPF3OgoDpXULb0R5XqV+uhtln4+RAmmd8=; b=J2RYldubWIsxy4YKAq0moS3G3j4fi8yCHRqMB4npeQU9P9nItVOqvlgfzSGzIlG8fn IO3JgQkzNLDENOXwVqw1oU6DIG3doIxaWrLap7d6UQ1g1ix1GnZU/Qb+BbZLiYWN7P31 P8l6ZIz4jM3puVOHJpTo0bQ9+mqgo5Nobg+FUNPAHBd0G5V36nd4ctcT6THK3QkX3HiK XMro5sPEtBS4YHytDTopBIsXNf7WAgWBv+4bG2pKJhvZaA5hTQ0a7nGY1zCgChlL3MUM Uviy580coTeEB3VTW0PsfX6DIEer/ggunWV5EiionbHoSHMZn6t8toNuAIm8iSB3sxPd uLcg== X-Gm-Message-State: ACrzQf3NhBTvPJkkUipR496qH6gYdqjsCr2H2/V7H9hJePCqzc5/Pxve AvsvSkJJe0Boh9mDYh85sIqVqQ== X-Google-Smtp-Source: AMsMyM4nd+8JiG4Qbt3OaJ5WL7VTFhfdy3U2bhmHB12MxhIYrGqcodjTvuokWPVyjHYedie2uggWdQ== X-Received: by 2002:a5d:584a:0:b0:231:636c:de28 with SMTP id i10-20020a5d584a000000b00231636cde28mr12412891wrf.175.1666359857728; Fri, 21 Oct 2022 06:44:17 -0700 (PDT) Received: from ?IPV6:2a01:e0a:982:cbb0:8104:adb4:5d77:2050? ([2a01:e0a:982:cbb0:8104:adb4:5d77:2050]) by smtp.gmail.com with ESMTPSA id h10-20020a5d504a000000b0022a9246c853sm19016553wrt.41.2022.10.21.06.44.16 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 21 Oct 2022 06:44:17 -0700 (PDT) Message-ID: <3bc7dfc1-3e26-926f-f55e-bc9e6531e04b@linaro.org> Date: Fri, 21 Oct 2022 15:44:16 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.3.1 From: Neil Armstrong Reply-To: neil.armstrong@linaro.org Subject: Re: [PATCH v4 4/4] arm64: dts: meson-gxbb: add SPI pinctrl nodes for CLK Content-Language: en-US To: Amjad Ouled-Ameur , Kevin Hilman , Jerome Brunet , Rob Herring , Martin Blumenstingl , Krzysztof Kozlowski , Mark Brown Cc: linux-amlogic@lists.infradead.org, Da Xue , linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org References: <20221004-up-aml-fix-spi-v4-0-0342d8e10c49@baylibre.com> <20221004-up-aml-fix-spi-v4-4-0342d8e10c49@baylibre.com> Organization: Linaro Developer Services In-Reply-To: <20221004-up-aml-fix-spi-v4-4-0342d8e10c49@baylibre.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 21/10/2022 15:31, Amjad Ouled-Ameur wrote: > Add SPICC Controller pin nodes for CLK line when idle for Amlogic GXBB > SoCs. > > Signed-off-by: Amjad Ouled-Ameur > --- > arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > > diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi > index 7c029f552a23..923d2d8bbb9c 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi > +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi > @@ -427,6 +427,20 @@ mux { > }; > }; > > + spi_idle_high_pins: spi-idle-high-pins { > + mux { > + groups = "spi_sclk"; > + bias-pull-up; > + }; > + }; > + > + spi_idle_low_pins: spi-idle-low-pins { > + mux { > + groups = "spi_sclk"; > + bias-pull-down; > + }; > + }; > + > spi_ss0_pins: spi-ss0 { > mux { > groups = "spi_ss0"; > Reviewed-by: Neil Armstrong