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[188.155.176.92]) by smtp.gmail.com with ESMTPSA id z1-20020a1709060ac100b006f3ef214de1sm2930593ejf.71.2022.05.29.00.56.17 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 29 May 2022 00:56:18 -0700 (PDT) Message-ID: <3c3e7995-ebb4-f57b-eb9f-834a0d55b5ea@linaro.org> Date: Sun, 29 May 2022 09:56:17 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.9.1 Subject: Re: [PATCH 1/7] dt-bindings: soc: add bindings for i.MX93 SRC Content-Language: en-US To: Peng Fan , "Peng Fan (OSS)" , "robh+dt@kernel.org" , "krzysztof.kozlowski+dt@linaro.org" , "sboyd@kernel.org" , "mturquette@baylibre.com" , "shawnguo@kernel.org" , "s.hauer@pengutronix.de" Cc: Aisheng Dong , "l.stach@pengutronix.de" , "kernel@pengutronix.de" , "festevam@gmail.com" , dl-linux-imx , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" References: <20220523113029.842753-1-peng.fan@oss.nxp.com> <20220523113029.842753-2-peng.fan@oss.nxp.com> <5bcbf7d3-daa8-6f00-6743-3d0328a82980@linaro.org> From: Krzysztof Kozlowski In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 27/05/2022 03:47, Peng Fan wrote: > > >> -----Original Message----- >> From: Krzysztof Kozlowski >> Sent: 2022年5月26日 20:08 >> To: Peng Fan ; Peng Fan (OSS) ; >> robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org; sboyd@kernel.org; >> mturquette@baylibre.com; shawnguo@kernel.org; s.hauer@pengutronix.de >> Cc: Aisheng Dong ; l.stach@pengutronix.de; >> kernel@pengutronix.de; festevam@gmail.com; dl-linux-imx >> ; devicetree@vger.kernel.org; >> linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org >> Subject: Re: [PATCH 1/7] dt-bindings: soc: add bindings for i.MX93 SRC >> >> On 24/05/2022 14:07, Peng Fan wrote: >>>> Subject: Re: [PATCH 1/7] dt-bindings: soc: add bindings for i.MX93 >>>> SRC >>>> >>>> On 24/05/2022 12:37, Peng Fan wrote: >>>>>> Subject: Re: [PATCH 1/7] dt-bindings: soc: add bindings for i.MX93 >>>>>> SRC >>>>>> >>>>>> On 23/05/2022 13:30, Peng Fan (OSS) wrote: >>>>>>> From: Peng Fan >>>>>>> >>>>>>> Add bindings for i.MX93 System Reset Controller(SRC). SRC supports >>>>>>> resets and power gating for mixes. >>>>>>> >>>>>>> Signed-off-by: Peng Fan >>>>>>> --- >>>>>>> .../bindings/soc/imx/fsl,imx93-src.yaml | 88 >>>>>> +++++++++++++++++++ >>>>>>> include/dt-bindings/power/imx93-power.h | 11 +++ >>>>>>> 2 files changed, 99 insertions(+) create mode 100644 >>>>>>> Documentation/devicetree/bindings/soc/imx/fsl,imx93-src.yaml >>>>>> >>>>>> File should be in respective subsystem, so probably power/reset? >>>>> >>>>> ok, will put under power. >>>>> >>>>>> >>>>>>> create mode 100644 include/dt-bindings/power/imx93-power.h >>>>>>> >>>>>>> diff --git >>>>>>> a/Documentation/devicetree/bindings/soc/imx/fsl,imx93-src.yaml >>>>>>> b/Documentation/devicetree/bindings/soc/imx/fsl,imx93-src.yaml >>>>>>> new file mode 100644 >>>>>>> index 000000000000..d45c1458b9c1 >>>>>>> --- /dev/null >>>>>>> +++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx93-src.yaml >>>>>>> @@ -0,0 +1,88 @@ >>>>>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML >>>>>>> +1.2 >>>>>>> +--- >>>>>>> +$id: >>>>>>> +> > +title: NXP i.MX9 System Reset Controller >>>>>>> + >>>>>>> +maintainers: >>>>>>> + - Peng Fan >>>>>>> + >>>>>>> +description: | >>>>>>> + The System Reset Controller (SRC) is responsible for the >>>>>>> +generation of >>>>>>> + all the system reset signals and boot argument latching. >>>>>>> + >>>>>>> + Its main functions are as follows, >>>>>>> + - Deals with all global system reset sources from other modules, >>>>>>> + and generates global system reset. >>>>>>> + - Responsible for power gating of MIXs (Slices) and their memory >>>>>>> + low power control. >>>>>>> + >>>>>>> +properties: >>>>>>> + compatible: >>>>>>> + items: >>>>>>> + - const: fsl,imx93-src >>>>>>> + - const: syscon >>>>>>> + >>>>>>> + reg: >>>>>>> + maxItems: 1 >>>>>>> + >>>>>>> + slice: >>>>>> >>>>>> Why do you need this subnode, instead of listing domains here? >>>>> >>>>> I follow >>>>> Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml >>>>> >>>>> There are several slices in SRC, just like there are many pgcs in gpcv2. >>>> >>>> Wait, but you have only one slice and you do no allow more of them. >>> >>> Slice is just a group node that could include many child nodes, such >>> as slice { >>> mediamix { >>> }; >>> mlmix { >>> }; >>> } >>> >>> The same >>>> as for gpcv2 - there is only one pgc. What's the point of that node? >>> >>> There are many pgcs, pgc is just a group node there, See >>> arch/arm64/boot/dts/freescale/imx8mp.dtsi. >> >> So this does not explain my question at all. Why do you need "slice" (or >> pgc) node? You have only one slice in this device, so this is some indirect layer >> without meaning... > > There is not only one slice, there are many slices. I use a slice node to group > all the slices, as below: > src: system-controller@xxx { > xxxxx > slice { > media: slice@0 { > } > ml: slice@1 { > } > ddr: slice@2 { > } > } > xxxxx > } > > With a slice node there, it will be also be easy for specific driver to know > specific node. I understand that, you repeat and repeat the same description of what you are doing, but that still does not explain my first question - why do you need superficial slice property containing all the slices? Best regards, Krzysztof