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* [PATCH v5 0/3] Add support for Amlogic A4/A5 Reset
@ 2025-03-20  9:42 Kelvin Zhang via B4 Relay
  2025-03-20  9:42 ` [PATCH v5 1/3] dt-bindings: reset: Add compatible for Amlogic A4/A5 Reset Controller Kelvin Zhang via B4 Relay
                   ` (3 more replies)
  0 siblings, 4 replies; 10+ messages in thread
From: Kelvin Zhang via B4 Relay @ 2025-03-20  9:42 UTC (permalink / raw)
  To: Philipp Zabel, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
	Neil Armstrong, Kevin Hilman, Jerome Brunet, Martin Blumenstingl
  Cc: devicetree, linux-arm-kernel, linux-amlogic, linux-kernel,
	Zelong Dong, Conor Dooley, Kelvin Zhang

Add dt-binding compatibles and device nodes for Amlogic A4/A5 reset.

Imported from f20240918074211.8067-1-zelong.dong@amlogic.com

Changes in v5:
- Rebasing on top of the latest upstream changes.
- Link to v4: https://lore.kernel.org/r/20250313-a4-a5-reset-v4-0-8076f684d6cf@amlogic.com

Changes in v4:
- Remove the superfluous 'items' in the dt-binding.
- Rebasing due to recent upstream changes.
- Link to v3: https://lore.kernel.org/all/20240918074211.8067-1-zelong.dong@amlogic.com/

Changes in v3:
- rebase on 'amlogic,t7-reset' patchset
- Link to v2: https://lore.kernel.org/all/20240715051217.5286-1-zelong.dong@amlogic.com/

Changes in v2:
- remove 'amlogic,t7-reset'
- move 'amlogic,c3-reset' to the other enum list
- move reset node from amlogic-a4-common.dtsi to
  amlogic-a4.dtsi/amlogic-a5.dtsi
- Link to v1: https://lore.kernel.org/all/20240703061610.37217-1-zelong.dong@amlogic.com/

---
Zelong Dong (3):
  dt-bindings: reset: Add compatible for Amlogic A4/A5 Reset Controller
  arm64: dts: amlogic: Add Amlogic A4 reset controller
  arm64: dts: amlogic: Add Amlogic A5 reset controller

 .../bindings/reset/amlogic,meson-reset.yaml   | 23 +++--
 .../arm64/boot/dts/amlogic/amlogic-a4-reset.h | 93 ++++++++++++++++++
 arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi   | 10 ++
 .../arm64/boot/dts/amlogic/amlogic-a5-reset.h | 95 +++++++++++++++++++
 arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi   | 10 ++
 5 files changed, 223 insertions(+), 8 deletions(-)
 create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-a4-reset.h
 create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-a5-reset.h

--
2.35.1

---
Zelong Dong (3):
      dt-bindings: reset: Add compatible for Amlogic A4/A5 Reset Controller
      arm64: dts: amlogic: Add A4 Reset Controller
      arm64: dts: amlogic: Add A5 Reset Controller

 .../bindings/reset/amlogic,meson-reset.yaml        | 22 +++--
 arch/arm64/boot/dts/amlogic/amlogic-a4-reset.h     | 93 +++++++++++++++++++++
 arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi        |  8 ++
 arch/arm64/boot/dts/amlogic/amlogic-a5-reset.h     | 95 ++++++++++++++++++++++
 arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi        |  8 ++
 5 files changed, 218 insertions(+), 8 deletions(-)
---
base-commit: ff7f9b199e3f4cc7d61df5a9a26a7cbb5c1492e6
change-id: 20250313-a4-a5-reset-6696e5b18e10

Best regards,
-- 
Kelvin Zhang <kelvin.zhang@amlogic.com>



^ permalink raw reply	[flat|nested] 10+ messages in thread

* [PATCH v5 1/3] dt-bindings: reset: Add compatible for Amlogic A4/A5 Reset Controller
  2025-03-20  9:42 [PATCH v5 0/3] Add support for Amlogic A4/A5 Reset Kelvin Zhang via B4 Relay
@ 2025-03-20  9:42 ` Kelvin Zhang via B4 Relay
  2025-03-20  9:42 ` [PATCH v5 2/3] arm64: dts: amlogic: Add A4 " Kelvin Zhang via B4 Relay
                   ` (2 subsequent siblings)
  3 siblings, 0 replies; 10+ messages in thread
From: Kelvin Zhang via B4 Relay @ 2025-03-20  9:42 UTC (permalink / raw)
  To: Philipp Zabel, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
	Neil Armstrong, Kevin Hilman, Jerome Brunet, Martin Blumenstingl
  Cc: devicetree, linux-arm-kernel, linux-amlogic, linux-kernel,
	Zelong Dong, Conor Dooley, Kelvin Zhang

From: Zelong Dong <zelong.dong@amlogic.com>

Add compatibles for Amlogic A4 and A5 reset controllers,
which fall back to 'amlogic,meson-s4-reset'.

Signed-off-by: Zelong Dong <zelong.dong@amlogic.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Link: https://lore.kernel.org/r/20240918074211.8067-2-zelong.dong@amlogic.com
Signed-off-by: Kelvin Zhang <kelvin.zhang@amlogic.com>
---
 .../bindings/reset/amlogic,meson-reset.yaml        | 22 ++++++++++++++--------
 1 file changed, 14 insertions(+), 8 deletions(-)

diff --git a/Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml b/Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml
index 695ef38a7bb346c92b4cf428e7615d45682c940a..150e95c0d9bed74c7045942610a311114a257889 100644
--- a/Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml
+++ b/Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml
@@ -12,14 +12,20 @@ maintainers:
 
 properties:
   compatible:
-    enum:
-      - amlogic,meson8b-reset # Reset Controller on Meson8b and compatible SoCs
-      - amlogic,meson-gxbb-reset # Reset Controller on GXBB and compatible SoCs
-      - amlogic,meson-axg-reset # Reset Controller on AXG and compatible SoCs
-      - amlogic,meson-a1-reset # Reset Controller on A1 and compatible SoCs
-      - amlogic,meson-s4-reset # Reset Controller on S4 and compatible SoCs
-      - amlogic,c3-reset # Reset Controller on C3 and compatible SoCs
-      - amlogic,t7-reset
+    oneOf:
+      - enum:
+          - amlogic,meson8b-reset # Reset Controller on Meson8b and compatible SoCs
+          - amlogic,meson-gxbb-reset # Reset Controller on GXBB and compatible SoCs
+          - amlogic,meson-axg-reset # Reset Controller on AXG and compatible SoCs
+          - amlogic,meson-a1-reset # Reset Controller on A1 and compatible SoCs
+          - amlogic,meson-s4-reset # Reset Controller on S4 and compatible SoCs
+          - amlogic,c3-reset # Reset Controller on C3 and compatible SoCs
+          - amlogic,t7-reset
+      - items:
+          - enum:
+              - amlogic,a4-reset
+              - amlogic,a5-reset
+          - const: amlogic,meson-s4-reset
 
   reg:
     maxItems: 1

-- 
2.37.1



^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH v5 2/3] arm64: dts: amlogic: Add A4 Reset Controller
  2025-03-20  9:42 [PATCH v5 0/3] Add support for Amlogic A4/A5 Reset Kelvin Zhang via B4 Relay
  2025-03-20  9:42 ` [PATCH v5 1/3] dt-bindings: reset: Add compatible for Amlogic A4/A5 Reset Controller Kelvin Zhang via B4 Relay
@ 2025-03-20  9:42 ` Kelvin Zhang via B4 Relay
  2025-03-24  7:06   ` Neil Armstrong
  2025-03-20  9:42 ` [PATCH v5 3/3] arm64: dts: amlogic: Add A5 " Kelvin Zhang via B4 Relay
  2025-05-05 12:38 ` [PATCH v5 0/3] Add support for Amlogic A4/A5 Reset Neil Armstrong
  3 siblings, 1 reply; 10+ messages in thread
From: Kelvin Zhang via B4 Relay @ 2025-03-20  9:42 UTC (permalink / raw)
  To: Philipp Zabel, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
	Neil Armstrong, Kevin Hilman, Jerome Brunet, Martin Blumenstingl
  Cc: devicetree, linux-arm-kernel, linux-amlogic, linux-kernel,
	Zelong Dong, Kelvin Zhang

From: Zelong Dong <zelong.dong@amlogic.com>

Add the device node and related header file for Amlogic
A4 reset controller.

Signed-off-by: Zelong Dong <zelong.dong@amlogic.com>
Link: https://lore.kernel.org/r/20240918074211.8067-3-zelong.dong@amlogic.com
Signed-off-by: Kelvin Zhang <kelvin.zhang@amlogic.com>
---
 arch/arm64/boot/dts/amlogic/amlogic-a4-reset.h | 93 ++++++++++++++++++++++++++
 arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi    |  8 +++
 2 files changed, 101 insertions(+)

diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4-reset.h b/arch/arm64/boot/dts/amlogic/amlogic-a4-reset.h
new file mode 100644
index 0000000000000000000000000000000000000000..f6a4c90bab3cf7cfaa3c98c522bed5e455b73bd3
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/amlogic-a4-reset.h
@@ -0,0 +1,93 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
+/*
+ * Copyright (c) 2024 Amlogic, Inc. All rights reserved.
+ */
+
+#ifndef __DTS_AMLOGIC_A4_RESET_H
+#define __DTS_AMLOGIC_A4_RESET_H
+
+/* RESET0 */
+/*						0-3 */
+#define RESET_USB				4
+/*						5-6*/
+#define RESET_U2PHY22				7
+#define RESET_USBPHY20				8
+#define RESET_U2PHY21				9
+#define RESET_USB2DRD				10
+#define RESET_U2H				11
+#define RESET_LED_CTRL				12
+/*						13-31 */
+
+/* RESET1 */
+#define RESET_AUDIO				32
+#define RESET_AUDIO_VAD				33
+/*						34*/
+#define RESET_DDR_APB				35
+#define RESET_DDR				36
+#define RESET_VOUT_VENC				37
+#define RESET_VOUT				38
+/*						39-47 */
+#define RESET_ETHERNET				48
+/*						49-63 */
+
+/* RESET2 */
+#define RESET_DEVICE_MMC_ARB			64
+#define RESET_IRCTRL				65
+/*						66*/
+#define RESET_TS_PLL				67
+/*						68-72*/
+#define RESET_SPICC_0				73
+#define RESET_SPICC_1				74
+/*						75-79*/
+#define RESET_MSR_CLK				80
+/*						81*/
+#define RESET_SAR_ADC				82
+/*						83-87*/
+#define RESET_ACODEC				88
+/*						89-90*/
+#define RESET_WATCHDOG				91
+/*						92-95*/
+
+/* RESET3 */
+/*						96-127 */
+
+/* RESET4 */
+/*						128-131 */
+#define RESET_PWM_AB				132
+#define RESET_PWM_CD				133
+#define RESET_PWM_EF				134
+#define RESET_PWM_GH				135
+/*						136-137*/
+#define RESET_UART_A				138
+#define RESET_UART_B				139
+/*						140*/
+#define RESET_UART_D				141
+#define RESET_UART_E				142
+/*						143-144*/
+#define RESET_I2C_M_A				145
+#define RESET_I2C_M_B				146
+#define RESET_I2C_M_C				147
+#define RESET_I2C_M_D				148
+/*						149-151*/
+#define RESET_SDEMMC_A				152
+/*						153*/
+#define RESET_SDEMMC_C				154
+/*						155-159*/
+
+/* RESET5 */
+/*						160-175*/
+#define RESET_BRG_AO_NIC_SYS			176
+/*						177*/
+#define RESET_BRG_AO_NIC_MAIN			178
+#define RESET_BRG_AO_NIC_AUDIO			179
+/*						180-183*/
+#define RESET_BRG_AO_NIC_ALL			184
+/*						185*/
+#define RESET_BRG_NIC_SDIO			186
+#define RESET_BRG_NIC_EMMC			187
+#define RESET_BRG_NIC_DSU			188
+#define RESET_BRG_NIC_CLK81			189
+#define RESET_BRG_NIC_MAIN			190
+#define RESET_BRG_NIC_ALL			191
+
+#endif
diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
index fa80fa365f13c4a93f5577f78bf2b3369cb91cb8..6537153b3026af1bf9d1df0a196619b716553cde 100644
--- a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
+++ b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
@@ -4,6 +4,7 @@
  */
 
 #include "amlogic-a4-common.dtsi"
+#include "amlogic-a4-reset.h"
 #include <dt-bindings/power/amlogic,a4-pwrc.h>
 #include <dt-bindings/pinctrl/amlogic,pinctrl.h>
 / {
@@ -51,6 +52,13 @@ pwrc: power-controller {
 };
 
 &apb {
+	reset: reset-controller@2000 {
+		compatible = "amlogic,a4-reset",
+			     "amlogic,meson-s4-reset";
+		reg = <0x0 0x2000 0x0 0x98>;
+		#reset-cells = <1>;
+	};
+
 	gpio_intc: interrupt-controller@4080 {
 		compatible = "amlogic,a4-gpio-intc",
 			     "amlogic,meson-gpio-intc";

-- 
2.37.1



^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH v5 3/3] arm64: dts: amlogic: Add A5 Reset Controller
  2025-03-20  9:42 [PATCH v5 0/3] Add support for Amlogic A4/A5 Reset Kelvin Zhang via B4 Relay
  2025-03-20  9:42 ` [PATCH v5 1/3] dt-bindings: reset: Add compatible for Amlogic A4/A5 Reset Controller Kelvin Zhang via B4 Relay
  2025-03-20  9:42 ` [PATCH v5 2/3] arm64: dts: amlogic: Add A4 " Kelvin Zhang via B4 Relay
@ 2025-03-20  9:42 ` Kelvin Zhang via B4 Relay
  2025-03-24  7:06   ` Neil Armstrong
  2025-05-05 12:38 ` [PATCH v5 0/3] Add support for Amlogic A4/A5 Reset Neil Armstrong
  3 siblings, 1 reply; 10+ messages in thread
From: Kelvin Zhang via B4 Relay @ 2025-03-20  9:42 UTC (permalink / raw)
  To: Philipp Zabel, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
	Neil Armstrong, Kevin Hilman, Jerome Brunet, Martin Blumenstingl
  Cc: devicetree, linux-arm-kernel, linux-amlogic, linux-kernel,
	Zelong Dong, Kelvin Zhang

From: Zelong Dong <zelong.dong@amlogic.com>

Add the device node and related header file for Amlogic
A5 reset controller.

Signed-off-by: Zelong Dong <zelong.dong@amlogic.com>
Link: https://lore.kernel.org/r/20240918074211.8067-4-zelong.dong@amlogic.com
Signed-off-by: Kelvin Zhang <kelvin.zhang@amlogic.com>
---
 arch/arm64/boot/dts/amlogic/amlogic-a5-reset.h | 95 ++++++++++++++++++++++++++
 arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi    |  8 +++
 2 files changed, 103 insertions(+)

diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a5-reset.h b/arch/arm64/boot/dts/amlogic/amlogic-a5-reset.h
new file mode 100644
index 0000000000000000000000000000000000000000..cdf0f515962097c606e4c53badb19df7d21606ec
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/amlogic-a5-reset.h
@@ -0,0 +1,95 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
+/*
+ * Copyright (c) 2024 Amlogic, Inc. All rights reserved.
+ */
+
+#ifndef __DTS_AMLOGIC_A5_RESET_H
+#define __DTS_AMLOGIC_A5_RESET_H
+
+/* RESET0 */
+/*						0-3 */
+#define RESET_USB				4
+/*						5-7 */
+#define RESET_USBPHY20				8
+/*						9 */
+#define RESET_USB2DRD				10
+/*						11-31 */
+
+/* RESET1 */
+#define RESET_AUDIO				32
+#define RESET_AUDIO_VAD				33
+/*                                              34 */
+#define RESET_DDR_APB				35
+#define RESET_DDR				36
+/*						37-40 */
+#define RESET_DSPA_DEBUG			41
+/*                                              42 */
+#define RESET_DSPA				43
+/*						44-46 */
+#define RESET_NNA				47
+#define RESET_ETHERNET				48
+/*						49-63 */
+
+/* RESET2 */
+#define RESET_ABUS_ARB				64
+#define RESET_IRCTRL				65
+/*						66 */
+#define RESET_TS_PLL				67
+/*						68-72 */
+#define RESET_SPICC_0				73
+#define RESET_SPICC_1				74
+#define RESET_RSA				75
+
+/*						76-79 */
+#define RESET_MSR_CLK				80
+#define RESET_SPIFC				81
+#define RESET_SAR_ADC				82
+/*						83-90 */
+#define RESET_WATCHDOG				91
+/*						92-95 */
+
+/* RESET3 */
+/*						96-127 */
+
+/* RESET4 */
+#define RESET_RTC				128
+/*						129-131 */
+#define RESET_PWM_AB				132
+#define RESET_PWM_CD				133
+#define RESET_PWM_EF				134
+#define RESET_PWM_GH				135
+/*						104-105 */
+#define RESET_UART_A				138
+#define RESET_UART_B				139
+#define RESET_UART_C				140
+#define RESET_UART_D				141
+#define RESET_UART_E				142
+/*						143*/
+#define RESET_I2C_S_A				144
+#define RESET_I2C_M_A				145
+#define RESET_I2C_M_B				146
+#define RESET_I2C_M_C				147
+#define RESET_I2C_M_D				148
+/*						149-151 */
+#define RESET_SDEMMC_A				152
+/*						153 */
+#define RESET_SDEMMC_C				154
+/*						155-159*/
+
+/* RESET5 */
+/*						160-175 */
+#define RESET_BRG_AO_NIC_SYS			176
+#define RESET_BRG_AO_NIC_DSPA			177
+#define RESET_BRG_AO_NIC_MAIN			178
+#define RESET_BRG_AO_NIC_AUDIO			179
+/*						180-183 */
+#define RESET_BRG_AO_NIC_ALL			184
+#define RESET_BRG_NIC_NNA			185
+#define RESET_BRG_NIC_SDIO			186
+#define RESET_BRG_NIC_EMMC			187
+#define RESET_BRG_NIC_DSU			188
+#define RESET_BRG_NIC_SYSCLK			189
+#define RESET_BRG_NIC_MAIN			190
+#define RESET_BRG_NIC_ALL			191
+
+#endif
diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi
index 32ed1776891bc7d1befd01a76c76048631606f5a..b1da8cbaa25a1844312a23bc39eb876df3c60df5 100644
--- a/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi
+++ b/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi
@@ -4,6 +4,7 @@
  */
 
 #include "amlogic-a4-common.dtsi"
+#include "amlogic-a5-reset.h"
 #include <dt-bindings/power/amlogic,a5-pwrc.h>
 / {
 	cpus {
@@ -50,6 +51,13 @@ pwrc: power-controller {
 };
 
 &apb {
+	reset: reset-controller@2000 {
+		compatible = "amlogic,a5-reset",
+			     "amlogic,meson-s4-reset";
+		reg = <0x0 0x2000 0x0 0x98>;
+		#reset-cells = <1>;
+	};
+
 	gpio_intc: interrupt-controller@4080 {
 		compatible = "amlogic,a5-gpio-intc",
 			     "amlogic,meson-gpio-intc";

-- 
2.37.1



^ permalink raw reply related	[flat|nested] 10+ messages in thread

* Re: [PATCH v5 2/3] arm64: dts: amlogic: Add A4 Reset Controller
  2025-03-20  9:42 ` [PATCH v5 2/3] arm64: dts: amlogic: Add A4 " Kelvin Zhang via B4 Relay
@ 2025-03-24  7:06   ` Neil Armstrong
  2025-04-11  8:23     ` Kelvin Zhang
  0 siblings, 1 reply; 10+ messages in thread
From: Neil Armstrong @ 2025-03-24  7:06 UTC (permalink / raw)
  To: kelvin.zhang, Philipp Zabel, Rob Herring, Krzysztof Kozlowski,
	Conor Dooley, Kevin Hilman, Jerome Brunet, Martin Blumenstingl
  Cc: devicetree, linux-arm-kernel, linux-amlogic, linux-kernel,
	Zelong Dong

On 20/03/2025 10:42, Kelvin Zhang via B4 Relay wrote:
> From: Zelong Dong <zelong.dong@amlogic.com>
> 
> Add the device node and related header file for Amlogic
> A4 reset controller.
> 
> Signed-off-by: Zelong Dong <zelong.dong@amlogic.com>
> Link: https://lore.kernel.org/r/20240918074211.8067-3-zelong.dong@amlogic.com
> Signed-off-by: Kelvin Zhang <kelvin.zhang@amlogic.com>
> ---
>   arch/arm64/boot/dts/amlogic/amlogic-a4-reset.h | 93 ++++++++++++++++++++++++++
>   arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi    |  8 +++
>   2 files changed, 101 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4-reset.h b/arch/arm64/boot/dts/amlogic/amlogic-a4-reset.h
> new file mode 100644
> index 0000000000000000000000000000000000000000..f6a4c90bab3cf7cfaa3c98c522bed5e455b73bd3
> --- /dev/null
> +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4-reset.h
> @@ -0,0 +1,93 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
> +/*
> + * Copyright (c) 2024 Amlogic, Inc. All rights reserved.
> + */
> +
> +#ifndef __DTS_AMLOGIC_A4_RESET_H
> +#define __DTS_AMLOGIC_A4_RESET_H
> +
> +/* RESET0 */
> +/*						0-3 */
> +#define RESET_USB				4
> +/*						5-6*/
> +#define RESET_U2PHY22				7
> +#define RESET_USBPHY20				8
> +#define RESET_U2PHY21				9
> +#define RESET_USB2DRD				10
> +#define RESET_U2H				11
> +#define RESET_LED_CTRL				12
> +/*						13-31 */
> +
> +/* RESET1 */
> +#define RESET_AUDIO				32
> +#define RESET_AUDIO_VAD				33
> +/*						34*/
> +#define RESET_DDR_APB				35
> +#define RESET_DDR				36
> +#define RESET_VOUT_VENC				37
> +#define RESET_VOUT				38
> +/*						39-47 */
> +#define RESET_ETHERNET				48
> +/*						49-63 */
> +
> +/* RESET2 */
> +#define RESET_DEVICE_MMC_ARB			64
> +#define RESET_IRCTRL				65
> +/*						66*/
> +#define RESET_TS_PLL				67
> +/*						68-72*/
> +#define RESET_SPICC_0				73
> +#define RESET_SPICC_1				74
> +/*						75-79*/
> +#define RESET_MSR_CLK				80
> +/*						81*/
> +#define RESET_SAR_ADC				82
> +/*						83-87*/
> +#define RESET_ACODEC				88
> +/*						89-90*/
> +#define RESET_WATCHDOG				91
> +/*						92-95*/
> +
> +/* RESET3 */
> +/*						96-127 */
> +
> +/* RESET4 */
> +/*						128-131 */
> +#define RESET_PWM_AB				132
> +#define RESET_PWM_CD				133
> +#define RESET_PWM_EF				134
> +#define RESET_PWM_GH				135
> +/*						136-137*/
> +#define RESET_UART_A				138
> +#define RESET_UART_B				139
> +/*						140*/
> +#define RESET_UART_D				141
> +#define RESET_UART_E				142
> +/*						143-144*/
> +#define RESET_I2C_M_A				145
> +#define RESET_I2C_M_B				146
> +#define RESET_I2C_M_C				147
> +#define RESET_I2C_M_D				148
> +/*						149-151*/
> +#define RESET_SDEMMC_A				152
> +/*						153*/
> +#define RESET_SDEMMC_C				154
> +/*						155-159*/
> +
> +/* RESET5 */
> +/*						160-175*/
> +#define RESET_BRG_AO_NIC_SYS			176
> +/*						177*/
> +#define RESET_BRG_AO_NIC_MAIN			178
> +#define RESET_BRG_AO_NIC_AUDIO			179
> +/*						180-183*/
> +#define RESET_BRG_AO_NIC_ALL			184
> +/*						185*/
> +#define RESET_BRG_NIC_SDIO			186
> +#define RESET_BRG_NIC_EMMC			187
> +#define RESET_BRG_NIC_DSU			188
> +#define RESET_BRG_NIC_CLK81			189
> +#define RESET_BRG_NIC_MAIN			190
> +#define RESET_BRG_NIC_ALL			191
> +
> +#endif
> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
> index fa80fa365f13c4a93f5577f78bf2b3369cb91cb8..6537153b3026af1bf9d1df0a196619b716553cde 100644
> --- a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
> @@ -4,6 +4,7 @@
>    */
>   
>   #include "amlogic-a4-common.dtsi"
> +#include "amlogic-a4-reset.h"
>   #include <dt-bindings/power/amlogic,a4-pwrc.h>
>   #include <dt-bindings/pinctrl/amlogic,pinctrl.h>
>   / {
> @@ -51,6 +52,13 @@ pwrc: power-controller {
>   };
>   
>   &apb {
> +	reset: reset-controller@2000 {
> +		compatible = "amlogic,a4-reset",
> +			     "amlogic,meson-s4-reset";
> +		reg = <0x0 0x2000 0x0 0x98>;
> +		#reset-cells = <1>;
> +	};
> +
>   	gpio_intc: interrupt-controller@4080 {
>   		compatible = "amlogic,a4-gpio-intc",
>   			     "amlogic,meson-gpio-intc";
> 

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v5 3/3] arm64: dts: amlogic: Add A5 Reset Controller
  2025-03-20  9:42 ` [PATCH v5 3/3] arm64: dts: amlogic: Add A5 " Kelvin Zhang via B4 Relay
@ 2025-03-24  7:06   ` Neil Armstrong
  0 siblings, 0 replies; 10+ messages in thread
From: Neil Armstrong @ 2025-03-24  7:06 UTC (permalink / raw)
  To: kelvin.zhang, Philipp Zabel, Rob Herring, Krzysztof Kozlowski,
	Conor Dooley, Kevin Hilman, Jerome Brunet, Martin Blumenstingl
  Cc: devicetree, linux-arm-kernel, linux-amlogic, linux-kernel,
	Zelong Dong

On 20/03/2025 10:42, Kelvin Zhang via B4 Relay wrote:
> From: Zelong Dong <zelong.dong@amlogic.com>
> 
> Add the device node and related header file for Amlogic
> A5 reset controller.
> 
> Signed-off-by: Zelong Dong <zelong.dong@amlogic.com>
> Link: https://lore.kernel.org/r/20240918074211.8067-4-zelong.dong@amlogic.com
> Signed-off-by: Kelvin Zhang <kelvin.zhang@amlogic.com>
> ---
>   arch/arm64/boot/dts/amlogic/amlogic-a5-reset.h | 95 ++++++++++++++++++++++++++
>   arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi    |  8 +++
>   2 files changed, 103 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a5-reset.h b/arch/arm64/boot/dts/amlogic/amlogic-a5-reset.h
> new file mode 100644
> index 0000000000000000000000000000000000000000..cdf0f515962097c606e4c53badb19df7d21606ec
> --- /dev/null
> +++ b/arch/arm64/boot/dts/amlogic/amlogic-a5-reset.h
> @@ -0,0 +1,95 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
> +/*
> + * Copyright (c) 2024 Amlogic, Inc. All rights reserved.
> + */
> +
> +#ifndef __DTS_AMLOGIC_A5_RESET_H
> +#define __DTS_AMLOGIC_A5_RESET_H
> +
> +/* RESET0 */
> +/*						0-3 */
> +#define RESET_USB				4
> +/*						5-7 */
> +#define RESET_USBPHY20				8
> +/*						9 */
> +#define RESET_USB2DRD				10
> +/*						11-31 */
> +
> +/* RESET1 */
> +#define RESET_AUDIO				32
> +#define RESET_AUDIO_VAD				33
> +/*                                              34 */
> +#define RESET_DDR_APB				35
> +#define RESET_DDR				36
> +/*						37-40 */
> +#define RESET_DSPA_DEBUG			41
> +/*                                              42 */
> +#define RESET_DSPA				43
> +/*						44-46 */
> +#define RESET_NNA				47
> +#define RESET_ETHERNET				48
> +/*						49-63 */
> +
> +/* RESET2 */
> +#define RESET_ABUS_ARB				64
> +#define RESET_IRCTRL				65
> +/*						66 */
> +#define RESET_TS_PLL				67
> +/*						68-72 */
> +#define RESET_SPICC_0				73
> +#define RESET_SPICC_1				74
> +#define RESET_RSA				75
> +
> +/*						76-79 */
> +#define RESET_MSR_CLK				80
> +#define RESET_SPIFC				81
> +#define RESET_SAR_ADC				82
> +/*						83-90 */
> +#define RESET_WATCHDOG				91
> +/*						92-95 */
> +
> +/* RESET3 */
> +/*						96-127 */
> +
> +/* RESET4 */
> +#define RESET_RTC				128
> +/*						129-131 */
> +#define RESET_PWM_AB				132
> +#define RESET_PWM_CD				133
> +#define RESET_PWM_EF				134
> +#define RESET_PWM_GH				135
> +/*						104-105 */
> +#define RESET_UART_A				138
> +#define RESET_UART_B				139
> +#define RESET_UART_C				140
> +#define RESET_UART_D				141
> +#define RESET_UART_E				142
> +/*						143*/
> +#define RESET_I2C_S_A				144
> +#define RESET_I2C_M_A				145
> +#define RESET_I2C_M_B				146
> +#define RESET_I2C_M_C				147
> +#define RESET_I2C_M_D				148
> +/*						149-151 */
> +#define RESET_SDEMMC_A				152
> +/*						153 */
> +#define RESET_SDEMMC_C				154
> +/*						155-159*/
> +
> +/* RESET5 */
> +/*						160-175 */
> +#define RESET_BRG_AO_NIC_SYS			176
> +#define RESET_BRG_AO_NIC_DSPA			177
> +#define RESET_BRG_AO_NIC_MAIN			178
> +#define RESET_BRG_AO_NIC_AUDIO			179
> +/*						180-183 */
> +#define RESET_BRG_AO_NIC_ALL			184
> +#define RESET_BRG_NIC_NNA			185
> +#define RESET_BRG_NIC_SDIO			186
> +#define RESET_BRG_NIC_EMMC			187
> +#define RESET_BRG_NIC_DSU			188
> +#define RESET_BRG_NIC_SYSCLK			189
> +#define RESET_BRG_NIC_MAIN			190
> +#define RESET_BRG_NIC_ALL			191
> +
> +#endif
> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi
> index 32ed1776891bc7d1befd01a76c76048631606f5a..b1da8cbaa25a1844312a23bc39eb876df3c60df5 100644
> --- a/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi
> @@ -4,6 +4,7 @@
>    */
>   
>   #include "amlogic-a4-common.dtsi"
> +#include "amlogic-a5-reset.h"
>   #include <dt-bindings/power/amlogic,a5-pwrc.h>
>   / {
>   	cpus {
> @@ -50,6 +51,13 @@ pwrc: power-controller {
>   };
>   
>   &apb {
> +	reset: reset-controller@2000 {
> +		compatible = "amlogic,a5-reset",
> +			     "amlogic,meson-s4-reset";
> +		reg = <0x0 0x2000 0x0 0x98>;
> +		#reset-cells = <1>;
> +	};
> +
>   	gpio_intc: interrupt-controller@4080 {
>   		compatible = "amlogic,a5-gpio-intc",
>   			     "amlogic,meson-gpio-intc";
> 

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v5 2/3] arm64: dts: amlogic: Add A4 Reset Controller
  2025-03-24  7:06   ` Neil Armstrong
@ 2025-04-11  8:23     ` Kelvin Zhang
  2025-04-11  8:32       ` neil.armstrong
  0 siblings, 1 reply; 10+ messages in thread
From: Kelvin Zhang @ 2025-04-11  8:23 UTC (permalink / raw)
  To: neil.armstrong, Philipp Zabel, Rob Herring, Krzysztof Kozlowski,
	Conor Dooley, Kevin Hilman, Jerome Brunet, Martin Blumenstingl
  Cc: devicetree, linux-arm-kernel, linux-amlogic, linux-kernel,
	Zelong Dong

Hi Neil,

There’s a conflict in amlogic-a4-common.dtsi due to recent merges.
Should I rebase onto the latest code and send a v6?

On 2025/3/24 15:06, Neil Armstrong wrote:
> 
> On 20/03/2025 10:42, Kelvin Zhang via B4 Relay wrote:
>> From: Zelong Dong <zelong.dong@amlogic.com>
>>
>> Add the device node and related header file for Amlogic
>> A4 reset controller.
>>
>> Signed-off-by: Zelong Dong <zelong.dong@amlogic.com>
>> Link: https://lore.kernel.org/r/20240918074211.8067-3- 
>> zelong.dong@amlogic.com
>> Signed-off-by: Kelvin Zhang <kelvin.zhang@amlogic.com>
>> ---
>>   arch/arm64/boot/dts/amlogic/amlogic-a4-reset.h | 93 ++++++++++++++++ 
>> ++++++++++
>>   arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi    |  8 +++
>>   2 files changed, 101 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4-reset.h b/arch/ 
>> arm64/boot/dts/amlogic/amlogic-a4-reset.h
>> new file mode 100644
>> index 
>> 0000000000000000000000000000000000000000..f6a4c90bab3cf7cfaa3c98c522bed5e455b73bd3
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4-reset.h
>> @@ -0,0 +1,93 @@
>> +/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
>> +/*
>> + * Copyright (c) 2024 Amlogic, Inc. All rights reserved.
>> + */
>> +
>> +#ifndef __DTS_AMLOGIC_A4_RESET_H
>> +#define __DTS_AMLOGIC_A4_RESET_H
>> +
>> +/* RESET0 */
>> +/*                                           0-3 */
>> +#define RESET_USB                            4
>> +/*                                           5-6*/
>> +#define RESET_U2PHY22                                7
>> +#define RESET_USBPHY20                               8
>> +#define RESET_U2PHY21                                9
>> +#define RESET_USB2DRD                                10
>> +#define RESET_U2H                            11
>> +#define RESET_LED_CTRL                               12
>> +/*                                           13-31 */
>> +
>> +/* RESET1 */
>> +#define RESET_AUDIO                          32
>> +#define RESET_AUDIO_VAD                              33
>> +/*                                           34*/
>> +#define RESET_DDR_APB                                35
>> +#define RESET_DDR                            36
>> +#define RESET_VOUT_VENC                              37
>> +#define RESET_VOUT                           38
>> +/*                                           39-47 */
>> +#define RESET_ETHERNET                               48
>> +/*                                           49-63 */
>> +
>> +/* RESET2 */
>> +#define RESET_DEVICE_MMC_ARB                 64
>> +#define RESET_IRCTRL                         65
>> +/*                                           66*/
>> +#define RESET_TS_PLL                         67
>> +/*                                           68-72*/
>> +#define RESET_SPICC_0                                73
>> +#define RESET_SPICC_1                                74
>> +/*                                           75-79*/
>> +#define RESET_MSR_CLK                                80
>> +/*                                           81*/
>> +#define RESET_SAR_ADC                                82
>> +/*                                           83-87*/
>> +#define RESET_ACODEC                         88
>> +/*                                           89-90*/
>> +#define RESET_WATCHDOG                               91
>> +/*                                           92-95*/
>> +
>> +/* RESET3 */
>> +/*                                           96-127 */
>> +
>> +/* RESET4 */
>> +/*                                           128-131 */
>> +#define RESET_PWM_AB                         132
>> +#define RESET_PWM_CD                         133
>> +#define RESET_PWM_EF                         134
>> +#define RESET_PWM_GH                         135
>> +/*                                           136-137*/
>> +#define RESET_UART_A                         138
>> +#define RESET_UART_B                         139
>> +/*                                           140*/
>> +#define RESET_UART_D                         141
>> +#define RESET_UART_E                         142
>> +/*                                           143-144*/
>> +#define RESET_I2C_M_A                                145
>> +#define RESET_I2C_M_B                                146
>> +#define RESET_I2C_M_C                                147
>> +#define RESET_I2C_M_D                                148
>> +/*                                           149-151*/
>> +#define RESET_SDEMMC_A                               152
>> +/*                                           153*/
>> +#define RESET_SDEMMC_C                               154
>> +/*                                           155-159*/
>> +
>> +/* RESET5 */
>> +/*                                           160-175*/
>> +#define RESET_BRG_AO_NIC_SYS                 176
>> +/*                                           177*/
>> +#define RESET_BRG_AO_NIC_MAIN                        178
>> +#define RESET_BRG_AO_NIC_AUDIO                       179
>> +/*                                           180-183*/
>> +#define RESET_BRG_AO_NIC_ALL                 184
>> +/*                                           185*/
>> +#define RESET_BRG_NIC_SDIO                   186
>> +#define RESET_BRG_NIC_EMMC                   187
>> +#define RESET_BRG_NIC_DSU                    188
>> +#define RESET_BRG_NIC_CLK81                  189
>> +#define RESET_BRG_NIC_MAIN                   190
>> +#define RESET_BRG_NIC_ALL                    191
>> +
>> +#endif
>> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi b/arch/arm64/ 
>> boot/dts/amlogic/amlogic-a4.dtsi
>> index 
>> fa80fa365f13c4a93f5577f78bf2b3369cb91cb8..6537153b3026af1bf9d1df0a196619b716553cde 100644
>> --- a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
>> +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
>> @@ -4,6 +4,7 @@
>>    */
>>
>>   #include "amlogic-a4-common.dtsi"
>> +#include "amlogic-a4-reset.h"
>>   #include <dt-bindings/power/amlogic,a4-pwrc.h>
>>   #include <dt-bindings/pinctrl/amlogic,pinctrl.h>
>>   / {
>> @@ -51,6 +52,13 @@ pwrc: power-controller {
>>   };
>>
>>   &apb {
>> +     reset: reset-controller@2000 {
>> +             compatible = "amlogic,a4-reset",
>> +                          "amlogic,meson-s4-reset";
>> +             reg = <0x0 0x2000 0x0 0x98>;
>> +             #reset-cells = <1>;
>> +     };
>> +
>>       gpio_intc: interrupt-controller@4080 {
>>               compatible = "amlogic,a4-gpio-intc",
>>                            "amlogic,meson-gpio-intc";
>>
> 
> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>

-- 
Best regards,

Kelvin Zhang


^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v5 2/3] arm64: dts: amlogic: Add A4 Reset Controller
  2025-04-11  8:23     ` Kelvin Zhang
@ 2025-04-11  8:32       ` neil.armstrong
  0 siblings, 0 replies; 10+ messages in thread
From: neil.armstrong @ 2025-04-11  8:32 UTC (permalink / raw)
  To: Kelvin Zhang, Philipp Zabel, Rob Herring, Krzysztof Kozlowski,
	Conor Dooley, Kevin Hilman, Jerome Brunet, Martin Blumenstingl
  Cc: devicetree, linux-arm-kernel, linux-amlogic, linux-kernel,
	Zelong Dong

On 11/04/2025 10:23, Kelvin Zhang wrote:
> Hi Neil,
> 
> There’s a conflict in amlogic-a4-common.dtsi due to recent merges.
> Should I rebase onto the latest code and send a v6?

Yes please rebase on top of https://web.git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux.git/log/?h=v6.16/arm64-dt

Thanks,
Neil

> 
> On 2025/3/24 15:06, Neil Armstrong wrote:
>>
>> On 20/03/2025 10:42, Kelvin Zhang via B4 Relay wrote:
>>> From: Zelong Dong <zelong.dong@amlogic.com>
>>>
<snip>


^ permalink raw reply	[flat|nested] 10+ messages in thread

* [PATCH v5 3/3] arm64: dts: amlogic: Add A5 Reset Controller
  2025-04-11 11:27 Kelvin Zhang via B4 Relay
@ 2025-04-11 11:27 ` Kelvin Zhang via B4 Relay
  0 siblings, 0 replies; 10+ messages in thread
From: Kelvin Zhang via B4 Relay @ 2025-04-11 11:27 UTC (permalink / raw)
  To: Philipp Zabel, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
	Neil Armstrong, Kevin Hilman, Jerome Brunet, Martin Blumenstingl
  Cc: devicetree, linux-arm-kernel, linux-amlogic, linux-kernel,
	Zelong Dong, Kelvin Zhang

From: Zelong Dong <zelong.dong@amlogic.com>

Add the device node and related header file for Amlogic
A5 reset controller.

Signed-off-by: Zelong Dong <zelong.dong@amlogic.com>
Link: https://lore.kernel.org/r/20240918074211.8067-4-zelong.dong@amlogic.com
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Kelvin Zhang <kelvin.zhang@amlogic.com>
---
 arch/arm64/boot/dts/amlogic/amlogic-a5-reset.h | 95 ++++++++++++++++++++++++++
 arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi    |  8 +++
 2 files changed, 103 insertions(+)

diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a5-reset.h b/arch/arm64/boot/dts/amlogic/amlogic-a5-reset.h
new file mode 100644
index 0000000000000000000000000000000000000000..cdf0f515962097c606e4c53badb19df7d21606ec
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/amlogic-a5-reset.h
@@ -0,0 +1,95 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
+/*
+ * Copyright (c) 2024 Amlogic, Inc. All rights reserved.
+ */
+
+#ifndef __DTS_AMLOGIC_A5_RESET_H
+#define __DTS_AMLOGIC_A5_RESET_H
+
+/* RESET0 */
+/*						0-3 */
+#define RESET_USB				4
+/*						5-7 */
+#define RESET_USBPHY20				8
+/*						9 */
+#define RESET_USB2DRD				10
+/*						11-31 */
+
+/* RESET1 */
+#define RESET_AUDIO				32
+#define RESET_AUDIO_VAD				33
+/*                                              34 */
+#define RESET_DDR_APB				35
+#define RESET_DDR				36
+/*						37-40 */
+#define RESET_DSPA_DEBUG			41
+/*                                              42 */
+#define RESET_DSPA				43
+/*						44-46 */
+#define RESET_NNA				47
+#define RESET_ETHERNET				48
+/*						49-63 */
+
+/* RESET2 */
+#define RESET_ABUS_ARB				64
+#define RESET_IRCTRL				65
+/*						66 */
+#define RESET_TS_PLL				67
+/*						68-72 */
+#define RESET_SPICC_0				73
+#define RESET_SPICC_1				74
+#define RESET_RSA				75
+
+/*						76-79 */
+#define RESET_MSR_CLK				80
+#define RESET_SPIFC				81
+#define RESET_SAR_ADC				82
+/*						83-90 */
+#define RESET_WATCHDOG				91
+/*						92-95 */
+
+/* RESET3 */
+/*						96-127 */
+
+/* RESET4 */
+#define RESET_RTC				128
+/*						129-131 */
+#define RESET_PWM_AB				132
+#define RESET_PWM_CD				133
+#define RESET_PWM_EF				134
+#define RESET_PWM_GH				135
+/*						104-105 */
+#define RESET_UART_A				138
+#define RESET_UART_B				139
+#define RESET_UART_C				140
+#define RESET_UART_D				141
+#define RESET_UART_E				142
+/*						143*/
+#define RESET_I2C_S_A				144
+#define RESET_I2C_M_A				145
+#define RESET_I2C_M_B				146
+#define RESET_I2C_M_C				147
+#define RESET_I2C_M_D				148
+/*						149-151 */
+#define RESET_SDEMMC_A				152
+/*						153 */
+#define RESET_SDEMMC_C				154
+/*						155-159*/
+
+/* RESET5 */
+/*						160-175 */
+#define RESET_BRG_AO_NIC_SYS			176
+#define RESET_BRG_AO_NIC_DSPA			177
+#define RESET_BRG_AO_NIC_MAIN			178
+#define RESET_BRG_AO_NIC_AUDIO			179
+/*						180-183 */
+#define RESET_BRG_AO_NIC_ALL			184
+#define RESET_BRG_NIC_NNA			185
+#define RESET_BRG_NIC_SDIO			186
+#define RESET_BRG_NIC_EMMC			187
+#define RESET_BRG_NIC_DSU			188
+#define RESET_BRG_NIC_SYSCLK			189
+#define RESET_BRG_NIC_MAIN			190
+#define RESET_BRG_NIC_ALL			191
+
+#endif
diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi
index 32ed1776891bc7d1befd01a76c76048631606f5a..b1da8cbaa25a1844312a23bc39eb876df3c60df5 100644
--- a/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi
+++ b/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi
@@ -4,6 +4,7 @@
  */
 
 #include "amlogic-a4-common.dtsi"
+#include "amlogic-a5-reset.h"
 #include <dt-bindings/power/amlogic,a5-pwrc.h>
 / {
 	cpus {
@@ -50,6 +51,13 @@ pwrc: power-controller {
 };
 
 &apb {
+	reset: reset-controller@2000 {
+		compatible = "amlogic,a5-reset",
+			     "amlogic,meson-s4-reset";
+		reg = <0x0 0x2000 0x0 0x98>;
+		#reset-cells = <1>;
+	};
+
 	gpio_intc: interrupt-controller@4080 {
 		compatible = "amlogic,a5-gpio-intc",
 			     "amlogic,meson-gpio-intc";

-- 
2.37.1



^ permalink raw reply related	[flat|nested] 10+ messages in thread

* Re: [PATCH v5 0/3] Add support for Amlogic A4/A5 Reset
  2025-03-20  9:42 [PATCH v5 0/3] Add support for Amlogic A4/A5 Reset Kelvin Zhang via B4 Relay
                   ` (2 preceding siblings ...)
  2025-03-20  9:42 ` [PATCH v5 3/3] arm64: dts: amlogic: Add A5 " Kelvin Zhang via B4 Relay
@ 2025-05-05 12:38 ` Neil Armstrong
  3 siblings, 0 replies; 10+ messages in thread
From: Neil Armstrong @ 2025-05-05 12:38 UTC (permalink / raw)
  To: Philipp Zabel, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
	Kevin Hilman, Jerome Brunet, Martin Blumenstingl, Kelvin Zhang
  Cc: devicetree, linux-arm-kernel, linux-amlogic, linux-kernel,
	Zelong Dong, Conor Dooley

Hi,

On Thu, 20 Mar 2025 17:42:07 +0800, Kelvin Zhang wrote:
> Add dt-binding compatibles and device nodes for Amlogic A4/A5 reset.
> 
> Imported from f20240918074211.8067-1-zelong.dong@amlogic.com
> 
> Changes in v5:
> - Rebasing on top of the latest upstream changes.
> - Link to v4: https://lore.kernel.org/r/20250313-a4-a5-reset-v4-0-8076f684d6cf@amlogic.com
> 
> [...]

Thanks, Applied to https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux.git (v6.16/arm64-dt)

[1/3] dt-bindings: reset: Add compatible for Amlogic A4/A5 Reset Controller
      (no commit info)
[2/3] arm64: dts: amlogic: Add A4 Reset Controller
      https://git.kernel.org/amlogic/c/946b51882b84f0cbec2acd203467866a7378abac
[3/3] arm64: dts: amlogic: Add A5 Reset Controller
      https://git.kernel.org/amlogic/c/f0911f29478992f37e91c208fe44c2ea5b378b61

These changes has been applied on the intermediate git tree [1].

The v6.16/arm64-dt branch will then be sent via a formal Pull Request to the Linux SoC maintainers
for inclusion in their intermediate git branches in order to be sent to Linus during
the next merge window, or sooner if it's a set of fixes.

In the cases of fixes, those will be merged in the current release candidate
kernel and as soon they appear on the Linux master branch they will be
backported to the previous Stable and Long-Stable kernels [2].

The intermediate git branches are merged daily in the linux-next tree [3],
people are encouraged testing these pre-release kernels and report issues on the
relevant mailing-lists.

If problems are discovered on those changes, please submit a signed-off-by revert
patch followed by a corrective changeset.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux.git
[2] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
[3] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git

-- 
Neil


^ permalink raw reply	[flat|nested] 10+ messages in thread

end of thread, other threads:[~2025-05-05 12:38 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-03-20  9:42 [PATCH v5 0/3] Add support for Amlogic A4/A5 Reset Kelvin Zhang via B4 Relay
2025-03-20  9:42 ` [PATCH v5 1/3] dt-bindings: reset: Add compatible for Amlogic A4/A5 Reset Controller Kelvin Zhang via B4 Relay
2025-03-20  9:42 ` [PATCH v5 2/3] arm64: dts: amlogic: Add A4 " Kelvin Zhang via B4 Relay
2025-03-24  7:06   ` Neil Armstrong
2025-04-11  8:23     ` Kelvin Zhang
2025-04-11  8:32       ` neil.armstrong
2025-03-20  9:42 ` [PATCH v5 3/3] arm64: dts: amlogic: Add A5 " Kelvin Zhang via B4 Relay
2025-03-24  7:06   ` Neil Armstrong
2025-05-05 12:38 ` [PATCH v5 0/3] Add support for Amlogic A4/A5 Reset Neil Armstrong
  -- strict thread matches above, loose matches on Subject: below --
2025-04-11 11:27 Kelvin Zhang via B4 Relay
2025-04-11 11:27 ` [PATCH v5 3/3] arm64: dts: amlogic: Add A5 Reset Controller Kelvin Zhang via B4 Relay

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