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Fri, 03 Oct 2025 02:04:38 -0700 (PDT) X-Google-Smtp-Source: AGHT+IE8osZ94IBlmYS6mfN6OxharIdntATWBnaR1H/rolxzIfSfK2AidWvRxzbO2yAgkm6oFVwbqA== X-Received: by 2002:a17:903:fa7:b0:256:2b13:5f11 with SMTP id d9443c01a7336-28e9a645c5emr30186365ad.40.1759482278141; Fri, 03 Oct 2025 02:04:38 -0700 (PDT) Received: from [10.151.37.217] ([202.46.23.19]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-28e8d1d95bdsm43659375ad.119.2025.10.03.02.04.33 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 03 Oct 2025 02:04:37 -0700 (PDT) Message-ID: <3cb50330-effc-4089-b80c-d454bccc63f3@oss.qualcomm.com> Date: Fri, 3 Oct 2025 14:34:31 +0530 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v16 0/9] Add PWM support for IPQ chipsets To: george.moussalem@outlook.com, =?UTF-8?Q?Uwe_Kleine-K=C3=B6nig?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Baruch Siach , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Devi Priya , Krzysztof Kozlowski , Baruch Siach References: <20251001-ipq-pwm-v16-0-300f237e0e68@outlook.com> Content-Language: en-US From: Kathiravan Thirumoorthy In-Reply-To: <20251001-ipq-pwm-v16-0-300f237e0e68@outlook.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=RZKdyltv c=1 sm=1 tr=0 ts=68df91a7 cx=c_pps a=JL+w9abYAAE89/QcEU+0QA==:117 a=j4ogTh8yFefVWWEFDRgCtg==:17 a=IkcTkHD0fZMA:10 a=x6icFKpwvdMA:10 a=MaTjDNABAf216yt7wJUA:9 a=QEXdDO2ut3YA:10 a=324X-CrmTo6CU4MGRt3R:22 X-Proofpoint-GUID: 6bBQ-EcQQNMDiPdMxg85b8FXu8AjjbY_ X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwOTI3MDAzMyBTYWx0ZWRfX4UMem530y6rI BVxCwk0Xdj+NE3G7Cweq2m4+1FRMi6ehIWtKgomGMmDVj169mKYoNC1OgMfw06M1/lm0xnufYfJ AXkxip0QWDreXs4OMSrjZuuYw24+fy0s5Zyy7yXhcO2BwKrM9Tivt4CI2//H0gBBfTvG6CI756x lELtZmeyYXqTcmgHRpG1LGpJn190LAFGWNLwHcahH20Sz6NQrMQ323jvZseWYWdF4maeOSCT10C mMxycXEEsSx0OachZTngqEbzrMhbC5tknb9pLdoylRJkZVur3DrNTBPYhn4aK22zNFjHm6dbpSG JEKt+NLZTzHTuY7MK3IZ8bgkgOjcn+/pwNtbrc3UJ4Zf979mhw7/x5TU7f7fsGpeL5W2TqIQLAs NhGbIgp61YaxN/Uaq0tmfFbcfGNjeg== X-Proofpoint-ORIG-GUID: 6bBQ-EcQQNMDiPdMxg85b8FXu8AjjbY_ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-10-03_02,2025-10-02_03,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 malwarescore=0 priorityscore=1501 adultscore=0 phishscore=0 impostorscore=0 spamscore=0 bulkscore=0 lowpriorityscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2509150000 definitions=main-2509270033 On 10/1/2025 7:34 PM, George Moussalem via B4 Relay wrote: > Add PWM driver and binding support for IPQ chipsets. > Also, add nodes to add support for pwm in ipq6018, ipq5018, ipq5332, and > ipq9574. > > I've picked up work based on Devi's last submission (v15) which dates > back to 05 October 2023 as below SoCs are still active. > > V16: > > Removed reg description in bindings as the offset is not relative to > the TCSR region anymore since simple-mfd support was dropped and PWM > nodes defined as their own nodes, not child nodes. Updated the example > too. > > Dropped patch to add simple-mfd support to the qcom,tcsr bindings George, thanks for taking up this series. Can you elaborate on why the qcom,tcsr binding change is dropped and made the PWM as an independent node? IIUC, it should be child of TCSR node. In V15, I see the qcom,tcsr binding is applied and *dropped only* due to dependencies / lack of information on the "pwm-cells" property. Thanks, Kathiravan T.