Re: [PATCH 4/5] arm64: dts: qcom: add IPQ9650 SoC and rdp488 board support

Kathiravan Thirumoorthy
2026-04-29T03:58:38Z

On 4/24/2026 4:51 PM, Konrad Dybcio wrote:
> On 4/15/26 3:33 PM, Kathiravan Thirumoorthy wrote:
>> Add initial device tree support for the Qualcomm IPQ9650 SoC and
>> rdp488 board.
>>
>> Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
>> ---
> Overall looks good, just a couple comments
>
> [...]
>
>> + CPU0: cpu@0 {
> Labels should be lowercase

Ack.

>
>> + device_type = "cpu";
>> + compatible = "arm,cortex-a55";
>> + reg = <0x0>;
>> + enable-method = "psci";
>> + next-level-cache = <&l2_0>;
> You likely want to add #cooling-cells = <2>

I left it because to add it along with the TSENS support. Do you prefer
to add it now? do let me know.

>
>
> [...]
>
>> + pmu-a55 {
>> + compatible = "arm,cortex-a55-pmu";
>> + interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
> You'll need to do something like:
>
> 9ce52e908bd5 ("arm64: dts: qcom: sm8650: switch to interrupt-cells 4 to add PPI partitions")
> 2c06e0797c32 ("arm64: dts: qcom: sm8650: add PPI interrupt partitions for the ARM PMUs")

Thanks for the pointers. Let me check and update.

>
> [...]
>
>> + uart1: serial@1a98000 {
>> + compatible = "qcom,geni-debug-uart";
>> + reg = <0x0 0x01a98000 0x0 0x4000>;
>> + clocks = <&gcc GCC_QUPV3_WRAP_SE6_CLK>;
>> + clock-names = "se";
>> + interrupts = <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>;
>> + status = "disabled";
> nit: please keep a \n above status

Ack.

>
> Konrad