From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3E5B321FF44 for ; Mon, 1 Sep 2025 06:56:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756709773; cv=none; b=VTDPT4PAb8D1X35YEKM6QpfWH7MaVjeU18lpQNuYvnBVG8RzG0D2pMt+rouVCLOjANdEfxmB1cIfGTg/EIgkwQB8eesWnnzzV0/f8ehpdlDYIcgJMrsdlBIeaIEb5PIE4ktUB9yb6r2Q6uWMGv3P/kuuoECaM3eD1f4Vi6JBfBQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756709773; c=relaxed/simple; bh=Kr7bzmorPtSCUASbDkgAHM3jzfUg4k7jSAJIfdMlUUM=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=fRDEHj2or6P8CAjSUBIWOGKC5iTR6jCWQ2TPtEu5Tx9LzfVzEWASt7ml3NmZWEDfVO16ALJYpMK/eACcUvKr8Tt0poefE6ttK5GfOr0XdmGwWGVfjkiT7mWBZa4h9YEqjXhy5JjGQe6p4wikv8g6v5XkRFC+WEvtLs4ElBEtX1o= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=THgSErlX; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="THgSErlX" Received: from pps.filterd (m0279868.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 57VND3qM017301 for ; Mon, 1 Sep 2025 06:56:11 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= EUTMpiJXGYapQKmYjxRPfwmA/QRa+grJXv3ZH9iFjRA=; b=THgSErlXkxFPhrDP QdsXzrF1SbsD/3nYOoVqP/InZd+C12uq6dgO3yUcHhVMuniE+IsH5bkq51bT1YYC +4tS+P15GoMQti7suWRACpJYSXbJRdPbKntmzXZmRCJc7tgEO/Ar7DISVEwPy5x8 XKblqNqSKrFOwqyyRC238PKH13UkmLJG+BBGpjMHqVASyfKnS8KRwBm0zSQwm+8S iO4/eyP3wM/E/xL3CRI4NvzQFcm91Mcz8peksXHQECckOvYpZmHSGDEe3uKqI2Tf wDLoXNxRhaLJZNEOLbm+vNAPmwhG+bHFHwGwiEbz9hwEdDI6Jj7MwRC0RsmTUND+ Jot0bQ== Received: from mail-pf1-f199.google.com (mail-pf1-f199.google.com [209.85.210.199]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 48urmjbmc8-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT) for ; Mon, 01 Sep 2025 06:56:11 +0000 (GMT) Received: by mail-pf1-f199.google.com with SMTP id d2e1a72fcca58-77241858ec1so1578419b3a.0 for ; Sun, 31 Aug 2025 23:56:10 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1756709770; x=1757314570; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=EUTMpiJXGYapQKmYjxRPfwmA/QRa+grJXv3ZH9iFjRA=; b=rCCMhRPXwZ8JbbFcAyvk3WZBv5qa4YbHwiw44fQSrhR3lGd/gU9GTJO1UzXBNMRsHU vYjSsxZCQC9nM3YSgiHOut1MsAvICkexHLWSZ0GUTAmrQKgLW3BMx0u/4SCNJEuzM0IG TBS7hvOFcbDKGh99iV0SEeGo/BF1d5186Gydnp1hKqffTV2DQecRGrArvnObb8GdIjnJ ifwUWlBHofGAS3Q13LBdfAP4j4bv78G0EBaLUVUDY9tHTuIqe0d2qyvlr5OufhNSqPyn s4WDTiC8dI1M674bRaNO/wR+OL0RpD7Marbla+/N5cTcj+wVbrC2a+ZpBC76wXY7zJw2 ubog== X-Forwarded-Encrypted: i=1; AJvYcCV+amGl3PMlTlTAG73C8Bd6c+oUAD/OtVSYtIZ7cU8meMD0g/3heDtJGPfM6+sYOwjm/aWK3HCThv9T@vger.kernel.org X-Gm-Message-State: AOJu0YzwS2z8ySzGc4cb26uL7S2FBhAMtOxbPyguEYK9RG+UxW+i+euB ZlHyrDVUZKO6xjjoWQOwZNfxm3aoJOWj8jXdCXrwjcUuwpaIg5+/puZ6Tx/9+k5RvMwaBAzwKRb 1bnVxHFDYHWY4q/tA2VDWYvNIgo4IYg/RNFwsPP9qKUIdYKEiNqov6hzxEXsdSw4/ X-Gm-Gg: ASbGncvMW1DLT40n8wJaPmi9h0le5M3DfBh3jtuim9DofCs9xsUVANf/oBGogE4Ajw9 hz5AbwSaHCYpnTIaa0Nth0U/0LRPhc9jNDoaXatmRLER4adIudyQ9f8YN7C6806gzhNNDL8edGl 8vmOWYWVbmmYpsKPP98YXzpcKm1PLcMpKwJm1aKrxoSkkYTAP+pQx4xYaQ2qLRiUYn4kGh8XUE2 TJCjqtk34Qu4AZf2xCJXdolW5hR1752SqsFf7Z9/M7zkmTdBEWNhEUS4U13WR/Qcl+owGsl2S+3 T/uLs2auZCR7eEmCP7rXfiOEVC2cdQsuw34FW4tFxIU5sEd5SXghS2jR9hItHnl3+o7CYQONdhS BEH0ZcGz/Byi0cYORONA5zVA9o9lpw3NNmg== X-Received: by 2002:a05:6a20:7fa8:b0:243:a91c:6564 with SMTP id adf61e73a8af0-243d6f431a3mr8852512637.50.1756709769859; Sun, 31 Aug 2025 23:56:09 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHSaKYhdRZRLVbaVGgPFjyPsISXyEB6DA5LnZU9TaTrGjeZVotxSEaTfa85XU0yVwRM0haE6w== X-Received: by 2002:a05:6a20:7fa8:b0:243:a91c:6564 with SMTP id adf61e73a8af0-243d6f431a3mr8852476637.50.1756709769320; Sun, 31 Aug 2025 23:56:09 -0700 (PDT) Received: from ?IPV6:2405:201:c40a:785d:2c0b:e596:ead5:2f45? ([2405:201:c40a:785d:2c0b:e596:ead5:2f45]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7724284fa02sm5689324b3a.102.2025.08.31.23.55.59 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 31 Aug 2025 23:56:08 -0700 (PDT) Message-ID: <3cbe6692-2ada-4034-8cb2-bc246bca5611@oss.qualcomm.com> Date: Mon, 1 Sep 2025 12:25:58 +0530 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v8 2/5] PCI: dwc: Add support for ELBI resource mapping To: Manivannan Sadhasivam Cc: cros-qcom-dts-watchers@chromium.org, Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , =?UTF-8?Q?Krzysztof_Wilczy=C5=84ski?= , Bjorn Helgaas , Jingoo Han , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, quic_vbadigan@quicinc.com, quic_mrana@quicinc.com, quic_vpernami@quicinc.com, mmareddy@quicinc.com References: <20250828-ecam_v4-v8-0-92a30e0fa02d@oss.qualcomm.com> <20250828-ecam_v4-v8-2-92a30e0fa02d@oss.qualcomm.com> Content-Language: en-US From: Krishna Chaitanya Chundru In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=OemYDgTY c=1 sm=1 tr=0 ts=68b5438b cx=c_pps a=WW5sKcV1LcKqjgzy2JUPuA==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=yJojWOMRYYMA:10 a=KKAkSRfTAAAA:8 a=EUspDBNiAAAA:8 a=8Rd1e7yjQrnBmPj41GQA:9 a=QEXdDO2ut3YA:10 a=OpyuDcXvxspvyRM73sMx:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-GUID: Qedtgw5LjF6JzGpKQ5oGxhJehWfgMYKl X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwODMwMDAyNCBTYWx0ZWRfX9vyw5j5eVXo5 Ujth1aBHjIVcCV6M5uLmHL2VKmPO/hAL8mhvD29YB8BkmCD1tl7xbFQszq/WGG+upETmmO1xo7Q qOm0XMUfX+RdolvPl68zYp4zSQ0XolM4bL1W1/B2F6p3NmfU3T13/QGY10s9kW4mcaYORXf4dpi E82/LsK7wxIo4XqoJyF/Xfn0FhvaM4l9Z3t2L5zL4AbTDCp7FTcxxtbwiFFagWEPNj29MR/Enet OiV1VcfPGFvB9Dll1uyLpTnX8A65V7WfE1mMXbzPJ2VpHAp/cFE6ZTpOUUDlPU6td5sQ8PsKeXp hTFRiquAH5Pdy/5efJ0T896Tuvx4r5jfBXW2x03pXXUoVjVrF0Sti7TIBB3I10EvR3gJ1lMdtsK j+edkCm/ X-Proofpoint-ORIG-GUID: Qedtgw5LjF6JzGpKQ5oGxhJehWfgMYKl X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-09-01_03,2025-08-28_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 suspectscore=0 spamscore=0 bulkscore=0 priorityscore=1501 adultscore=0 clxscore=1015 phishscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2508300024 On 8/31/2025 5:18 PM, Manivannan Sadhasivam wrote: > On Thu, Aug 28, 2025 at 01:04:23PM GMT, Krishna Chaitanya Chundru wrote: >> External Local Bus Interface(ELBI) registers are optional registers in >> DWC IPs having vendor specific registers. >> >> Since ELBI register space is applicable for all DWC based controllers, >> move the resource get code to DWC core and make it optional. >> >> Suggested-by: Manivannan Sadhasivam >> Reviewed-by: Manivannan Sadhasivam >> Signed-off-by: Krishna Chaitanya Chundru >> --- >> drivers/pci/controller/dwc/pcie-designware.c | 9 +++++++++ >> drivers/pci/controller/dwc/pcie-designware.h | 1 + >> 2 files changed, 10 insertions(+) >> >> diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c >> index 89aad5a08928cc29870ab258d33bee9ff8f83143..4684c671a81bee468f686a83cc992433b38af59d 100644 >> --- a/drivers/pci/controller/dwc/pcie-designware.c >> +++ b/drivers/pci/controller/dwc/pcie-designware.c >> @@ -167,6 +167,15 @@ int dw_pcie_get_resources(struct dw_pcie *pci) >> } >> } >> >> + if (!pci->elbi_base) { > > Why this check is needed? Are we expecting any DWC glue drivers to supply > 'dw_pcie::elbi_base' on their own? > I was following the same way that existed for for dbi_base, where we are allowing DWC glue drivers to supply if they had any different approach like ./pci-dra7xx.c driver. - Krishna Chaitanya. > - Mani >