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[2001:14ba:a0db:1f00::8a5]) by smtp.gmail.com with ESMTPSA id s6-20020a2e83c6000000b002b71a928c63sm695068ljh.115.2023.07.18.15.06.04 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 18 Jul 2023 15:06:04 -0700 (PDT) Message-ID: <3ce19d8f-97d8-15b6-5148-78e200b112e9@linaro.org> Date: Wed, 19 Jul 2023 01:06:03 +0300 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.13.0 Subject: Re: [PATCH v3 06/15] dt-bindings: display/msm: sc7180-dpu: Describe SM6125 Content-Language: en-GB To: Marijn Suijten , Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd , Rob Clark , Abhinav Kumar , Sean Paul , David Airlie , Daniel Vetter , Krishna Manikandan , Loic Poulain , Konrad Dybcio Cc: ~postmarketos/upstreaming@lists.sr.ht, AngeloGioacchino Del Regno , Konrad Dybcio , Martin Botka , Jami Kettunen , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Lux Aliaga , Rob Herring References: <20230718-sm6125-dpu-v3-0-6c5a56e99820@somainline.org> <20230718-sm6125-dpu-v3-6-6c5a56e99820@somainline.org> From: Dmitry Baryshkov In-Reply-To: <20230718-sm6125-dpu-v3-6-6c5a56e99820@somainline.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 19/07/2023 00:24, Marijn Suijten wrote: > SM6125 is identical to SM6375 except that while downstream also defines > a throttle clock, its presence results in timeouts whereas SM6375 > requires it to not observe any timeouts. This is represented by > reducing the clock array length to 6 so that it cannot be passed. Note > that any SoC other than SM6375 (currently SC7180 and SM6350) are > unconstrained and could either pass or leave out this "throttle" clock. Could you please describe, what kind of timeouts do you observe? Is this the DSI underruns issue? If so, it might be fixed by the MDSS interconnect fix ([1]). [1] https://patchwork.freedesktop.org/series/116576/ > > Reviewed-by: Rob Herring > Signed-off-by: Marijn Suijten > --- > .../devicetree/bindings/display/msm/qcom,sc7180-dpu.yaml | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > > diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7180-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-dpu.yaml > index 630b11480496..37f66940c5e3 100644 > --- a/Documentation/devicetree/bindings/display/msm/qcom,sc7180-dpu.yaml > +++ b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-dpu.yaml > @@ -15,6 +15,7 @@ properties: > compatible: > enum: > - qcom,sc7180-dpu > + - qcom,sm6125-dpu > - qcom,sm6350-dpu > - qcom,sm6375-dpu > > @@ -73,6 +74,19 @@ allOf: > clock-names: > minItems: 7 > > + - if: > + properties: > + compatible: > + const: qcom,sm6125-dpu > + > + then: > + properties: > + clocks: > + maxItems: 6 > + > + clock-names: > + maxItems: 6 > + > examples: > - | > #include > -- With best wishes Dmitry