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d="scan'208";a="112913761" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa2.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 08 Apr 2021 08:30:17 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.2; Thu, 8 Apr 2021 08:30:16 -0700 Received: from [10.12.88.246] (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2176.2 via Frontend Transport; Thu, 8 Apr 2021 08:30:14 -0700 Subject: Re: [PATCH 22/24] ARM: at91: sama7: introduce sama7 SoC family To: Claudiu Beznea , , , , CC: , , , Eugen Hristev References: <20210331105908.23027-1-claudiu.beznea@microchip.com> <20210331105908.23027-23-claudiu.beznea@microchip.com> From: Nicolas Ferre Organization: microchip Message-ID: <3d39d952-03f2-0952-72ee-b639fd4339f2@microchip.com> Date: Thu, 8 Apr 2021 17:30:14 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.7.1 MIME-Version: 1.0 In-Reply-To: <20210331105908.23027-23-claudiu.beznea@microchip.com> Content-Type: text/plain; charset="windows-1252"; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hi, On 31/03/2021 at 12:59, Claudiu Beznea wrote: > From: Eugen Hristev > > Introduce new family of SoCs, sama7, and first SoC, sama7g5. > > Signed-off-by: Eugen Hristev > Signed-off-by: Claudiu Beznea > --- > arch/arm/mach-at91/Makefile | 1 + > arch/arm/mach-at91/sama7.c | 48 +++++++++++++++++++++++++++++++++++++ > 2 files changed, 49 insertions(+) > create mode 100644 arch/arm/mach-at91/sama7.c > > diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile > index f565490f1b70..6cc6624cddac 100644 > --- a/arch/arm/mach-at91/Makefile > +++ b/arch/arm/mach-at91/Makefile > @@ -9,6 +9,7 @@ obj-$(CONFIG_SOC_AT91SAM9) += at91sam9.o > obj-$(CONFIG_SOC_SAM9X60) += sam9x60.o > obj-$(CONFIG_SOC_SAMA5) += sama5.o > obj-$(CONFIG_SOC_SAMV7) += samv7.o > +obj-$(CONFIG_SOC_SAMA7) += sama7.o Nit: alphabetic order tells that it should be before samv7 > > # Power Management > obj-$(CONFIG_ATMEL_PM) += pm.o pm_suspend.o > diff --git a/arch/arm/mach-at91/sama7.c b/arch/arm/mach-at91/sama7.c > new file mode 100644 > index 000000000000..e04cadb569ad > --- /dev/null > +++ b/arch/arm/mach-at91/sama7.c > @@ -0,0 +1,48 @@ > +// SPDX-License-Identifier: GPL-2.0-or-later > +/* > + * Setup code for SAMA7 > + * > + * Copyright (C) 2021 Microchip Technology, Inc. and its subsidiaries > + * > + */ > + > +#include > +#include > + > +#include > +#include > + > +#include "generic.h" > + > +static void __init sama7_common_init(void) > +{ > + of_platform_default_populate(NULL, NULL, NULL); > +} > + > +static void __init sama7_dt_device_init(void) > +{ > + sama7_common_init(); > +} > + > +static const char *const sama7_dt_board_compat[] __initconst = { > + "microchip,sama7", > + NULL > +}; > + > +DT_MACHINE_START(sama7_dt, "Microchip SAMA7") > + /* Maintainer: Microchip */ > + .init_machine = sama7_dt_device_init, > + .dt_compat = sama7_dt_board_compat, > +MACHINE_END > + > +static const char *const sama7g5_dt_board_compat[] __initconst = { > + "microchip,sama7g5", > + NULL > +}; > + > +DT_MACHINE_START(sama7g5_dt, "Microchip SAMA7G5") > + /* Maintainer: Microchip */ > + .init_machine = sama7_dt_device_init, > + .dt_compat = sama7g5_dt_board_compat, > +MACHINE_END I'm not sure we need two DT_MACHINE_START() entries and associated functions right now. Probably the most generic one is sufficient. We can add such distinction in the future if the need arises. Regards, Nicolas -- Nicolas Ferre