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Fri, 27 Mar 2026 03:57:17 -0700 (PDT) X-Received: by 2002:a05:6a21:202:b0:39b:e321:63ef with SMTP id adf61e73a8af0-39c87b64f7dmr1848068637.57.1774609036530; Fri, 27 Mar 2026 03:57:16 -0700 (PDT) Received: from [192.168.1.2] ([49.204.104.108]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c768b649a18sm479116a12.0.2026.03.27.03.57.09 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 27 Mar 2026 03:57:16 -0700 (PDT) Message-ID: <3d3f51e7-02c1-4628-a381-5a1ba67b5bc1@oss.qualcomm.com> Date: Fri, 27 Mar 2026 16:27:08 +0530 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 00/13] Enable I2C on SA8255p Qualcomm platforms To: Mattijs Korpershoek , Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mukesh Kumar Savaliya , Viken Dadhaniya , Bjorn Andersson , Konrad Dybcio , linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bjorn.andersson@oss.qualcomm.com, dmitry.baryshkov@oss.qualcomm.com, konrad.dybcio@oss.qualcomm.com Cc: prasad.sodagudi@oss.qualcomm.com, aniket.randive@oss.qualcomm.com, chandana.chiluveru@oss.qualcomm.com, jyothi.seerapu@oss.qualcomm.com, chiluka.harish@oss.qualcomm.com References: <20260227061544.1785978-1-praveen.talari@oss.qualcomm.com> <873425m329.fsf@kernel.org> Content-Language: en-US From: Praveen Talari In-Reply-To: <873425m329.fsf@kernel.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=NenrFmD4 c=1 sm=1 tr=0 ts=69c6628e cx=c_pps a=vVfyC5vLCtgYJKYeQD43oA==:117 a=1ey5pj550HX3UePapPL9UQ==:17 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=p0WdMEafAAAA:8 a=EUspDBNiAAAA:8 a=VwQbUJbxAAAA:8 a=d3VRfvEVtl9Zxjpl_kAA:9 a=QEXdDO2ut3YA:10 a=rl5im9kqc5Lf4LNbBjHf:22 X-Proofpoint-GUID: gy3WGuGBPUQrwAWXzvVjV_Cxp-ongXjj X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzI3MDA3NyBTYWx0ZWRfX5TAdVO7HWmp8 IEI4JJYjKG5kQr7epZxzsQ6cxfaQZtvMcIKpcfTFqZH4QlDbw35p/Qn4iNAQQlEJ0Ri8T5aonc2 qpa6cA8K42xLSzlzQaLauNsji9ZRqaz/RYJmy/dTeUqgtO0nQphGqz3IafklYahZXsxunwJ2AaW QZTfVH9g4OBQ9vcY9icDRavlaBVNhFnn2RhO3Y0mfJyxXdRUip+qIyjR82XSL2HgBNfT9X7qz95 Q9gfqkhmAPcQb9Zcgv0kbdauRs1UUYqKld4uty8hLtm5D8M0URxhXw2U/g/APfnZd3AcguMetFi 8ZJ50/6Q4A3QTAmP2wuiT11lHSi01R+xKdqlrMSs4E3u9hvEp78b7JOcoBdS35ZCOStnJFC5epb Qs2EbHVm33YI9gVXCwDqvWJmfWGyq4MjhgE9wd7JLtScaXjc+ARzJaCnOQVo/advlu/Ue/BuB5Y Ki5JtVF3R9frVnjW66A== X-Proofpoint-ORIG-GUID: gy3WGuGBPUQrwAWXzvVjV_Cxp-ongXjj X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-26_04,2026-03-26_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 spamscore=0 priorityscore=1501 phishscore=0 lowpriorityscore=0 clxscore=1015 suspectscore=0 adultscore=0 impostorscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603270077 Hi On 3/12/2026 9:51 PM, Mattijs Korpershoek wrote: > Hi Praveen, > > Thank you for the series. > > On Fri, Feb 27, 2026 at 11:45, Praveen Talari wrote: > >> The Qualcomm automotive SA8255p SoC relies on firmware to configure >> platform resources, including clocks, interconnects and TLMM. >> The driver requests resources operations over SCMI using power >> and performance protocols. >> >> The SCMI power protocol enables or disables resources like clocks, >> interconnect paths, and TLMM (GPIOs) using runtime PM framework APIs, >> such as resume/suspend, to control power states(on/off). >> >> The SCMI performance protocol manages I2C frequency, with each >> frequency rate represented by a performance level. The driver uses >> geni_se_set_perf_opp() API to request the desired frequency rate.. >> >> As part of geni_se_set_perf_opp(), the OPP for the requested frequency >> is obtained using dev_pm_opp_find_freq_floor() and the performance >> level is set using dev_pm_opp_set_opp(). >> >> Praveen Talari (13): >> soc: qcom: geni-se: Refactor geni_icc_get() and make qup-memory ICC >> path optional >> soc: qcom: geni-se: Add geni_icc_set_bw_ab() function >> soc: qcom: geni-se: Introduce helper API for resource initialization >> soc: qcom: geni-se: Handle core clk in geni_se_clks_off() and >> geni_se_clks_on() >> soc: qcom: geni-se: Add resources activation/deactivation helpers >> soc: qcom: geni-se: Introduce helper API for attaching power domains >> soc: qcom: geni-se: Introduce helper APIs for performance control >> dt-bindings: i2c: Describe SA8255p >> i2c: qcom-geni: Isolate serial engine setup >> i2c: qcom-geni: Move resource initialization to separate function >> i2c: qcom-geni: Use resources helper APIs in runtime PM functions >> i2c: qcom-geni: Store of_device_id data in driver private struct >> i2c: qcom-geni: Enable I2C on SA8255p Qualcomm platforms > > I did some basic testing on the Ride SX (SA8775P) board with this > series using base: > commit 80234b5ab240 ("Merge tag 'rproc-v7.0-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux") > > / # i2cdetect -l > i2c-11 i2c Geni-I2C I2C adapter > i2c-18 i2c Geni-I2C I2C adapter > / # i2cdetect -F 11 > Functionalities implemented by bus #11 > I2C yes > SMBus quick command no > SMBus send byte yes > SMBus receive byte yes > SMBus write byte yes > SMBus read byte yes > SMBus write word yes > SMBus read word yes > SMBus process call yes > SMBus block write yes > SMBus block read no > SMBus block process call no > SMBus PEC yes > I2C block write yes > I2C block read yes > / # i2cdetect -F 18 > Functionalities implemented by bus #18 > I2C yes > SMBus quick command no > SMBus send byte yes > SMBus receive byte yes > SMBus write byte yes > SMBus read byte yes > SMBus write word yes > SMBus read word yes > SMBus process call yes > SMBus block write yes > SMBus block read no > SMBus block process call no > SMBus PEC yes > I2C block write yes > I2C block read yes > > Note that I used a downstream device tree which has both > i2c11 (i2c@a90000) and i2c18(i2c@890000) enabled. > > The sources for that dts can be found here: > https://gitlab.com/mkorpershoek-rh/downstream-dtbs/-/tree/8775-upstream-i2c/qcom?ref_type=heads > > If this is considered useful testing, feel free to add: > > Tested-by: Mattijs Korpershoek Thank you for validation and Tested-by tag. @Andi Shyti, Looking forward to the series being picked up. Feedback is welcome if anything further is needed. Thanks, Praveen Talari > >> --- >> v3->v4 >> - Added a new patch(4/13) to handle core clk as part of >> geni_se_clks_off/on(). >> >> .../bindings/i2c/qcom,sa8255p-geni-i2c.yaml | 64 ++++ >> drivers/i2c/busses/i2c-qcom-geni.c | 324 +++++++++--------- >> drivers/soc/qcom/qcom-geni-se.c | 270 ++++++++++++++- >> include/linux/soc/qcom/geni-se.h | 19 + >> 4 files changed, 491 insertions(+), 186 deletions(-) >> create mode 100644 Documentation/devicetree/bindings/i2c/qcom,sa8255p-geni-i2c.yaml >> >> >> base-commit: 7d6661873f6b54c75195780a40d66bad3d482d8f >> -- >> 2.34.1