From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CB0DFC47080 for ; Tue, 12 Apr 2022 10:09:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1355016AbiDLKIr (ORCPT ); Tue, 12 Apr 2022 06:08:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45218 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1377958AbiDLJ4B (ORCPT ); Tue, 12 Apr 2022 05:56:01 -0400 Received: from mail-ej1-x632.google.com (mail-ej1-x632.google.com [IPv6:2a00:1450:4864:20::632]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 791756BDEE for ; Tue, 12 Apr 2022 02:00:53 -0700 (PDT) Received: by mail-ej1-x632.google.com with SMTP id r13so36002792ejd.5 for ; Tue, 12 Apr 2022 02:00:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=message-id:date:mime-version:user-agent:subject:content-language:to :cc:references:from:in-reply-to:content-transfer-encoding; bh=+RIKl9qWM3M6+J1iZ1YqrZZKm7+7GiKis/oEh6MmLLI=; b=iFcddDhU04FA9QotxDH04NLwV+JoUSATF1jdNc6z/JCmb8CxuYAN/5JrdhXmt2pSnP iscYA4JVVoP57d5x9Oc0fhNxO4HSIyhMt5VZsP01D7V7qWZhKA4czrWExVUm4AyCSmBc fo91qKBj5KbwzfkTA+v2ZVUCMV2FxZOEjaXYvkHVdAxsV1W8x9CmFV+foBcNsrbo/taB tuQsDHoVRlrlrm7RqWJE14PmSxHIaV46jZS86Q38v9M8KPzdDgEI6m3dhv+7quoOR+Kf /y4nalFFpowbmvtO13KqE+3XritUnU9G7JajxW98uxeD9d+DLbFfZF6C4B4L1rSv2FdX cqyQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:message-id:date:mime-version:user-agent:subject :content-language:to:cc:references:from:in-reply-to :content-transfer-encoding; bh=+RIKl9qWM3M6+J1iZ1YqrZZKm7+7GiKis/oEh6MmLLI=; b=40JwNLgdINhXdlJBCBLTjZ6WkKZPDhhvFfYLDZK86+HiLa7Q5dm1Q28orofR7A3o0N 499f3do8Fui/y3xGQ0+dI1baaU5T8rNCGiduVVVUnhemQypsW+MQPeFAVBHmjes7HldT X1KZmP2Geau0M3wbVUC5hxrxiHJ7oq/bCjebrw5sjzRWvTIqky8VSUoBgk+JvnRC4NaK gu5yNzX+Uarhz1tQwmkVzo9wZDIle6NY+pSp4mcykGl2lD4eFFrne/gJBWGzWUmlYp+r wt/i9qYy/8nEPnX13fRbquEIX67idkTYS0/A03TTeI1UMFm0T6yVtPcGjTdIpFFQ2Qzk w31Q== X-Gm-Message-State: AOAM530RX4mFc/lNI8TkEVqaiNph2hhT5YxN3Ci+/XhEyCUztDAbs9Zp bQelh2+hyha856OC8PFr0p6SDA== X-Google-Smtp-Source: ABdhPJw6i3XMkUE2++p+HzcLbPrBel/BYSuUENRohHrLz2IzEC89n5KJaIN+OM8MX1+1ss8Rf20a0Q== X-Received: by 2002:a17:907:724b:b0:6e8:a44:4691 with SMTP id ds11-20020a170907724b00b006e80a444691mr33583698ejc.453.1649754051940; Tue, 12 Apr 2022 02:00:51 -0700 (PDT) Received: from [192.168.0.194] (xdsl-188-155-201-27.adslplus.ch. [188.155.201.27]) by smtp.gmail.com with ESMTPSA id h7-20020a50cf87000000b0041b7bd52e1fsm16798837edk.78.2022.04.12.02.00.50 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 12 Apr 2022 02:00:51 -0700 (PDT) Message-ID: <3f3ec103-a7d8-b56d-afff-94a0379dffec@linaro.org> Date: Tue, 12 Apr 2022 11:00:50 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.7.0 Subject: Re: [PATCH 1/2] dt-bindings: timer: Update TI timer to yaml Content-Language: en-US To: Tony Lindgren , Rob Herring , Krzysztof Kozlowski Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org, Daniel Lezcano , Keerthy , Nishanth Menon , Vignesh Raghavendra References: <20220411111858.16814-1-tony@atomide.com> From: Krzysztof Kozlowski In-Reply-To: <20220411111858.16814-1-tony@atomide.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 11/04/2022 13:18, Tony Lindgren wrote: > Let's update the TI timer binding to use yaml. As this binding is specific > to the TI dual-mode timers also known as dm-timers, let's use file name > ti,timer-dm.yaml to avoid confusion with other timers. > > We also correct the issue with the old binding that was out of date for > several properties. > > The am43 related timers are undocumented, but compatible with the am3 > timers. Let's add the am43 timers too. > > The dm814 and dm816 timers are missing, let's add them. > > Some timers on some SoCs are dual mapped, like the ABE timers on omap4 > and 5. The reg property maxItems must be updated to 2. (...) > + reg: > + minItems: 1 > + maxItems: 2 > + description: Timer IO register range > + Apart from what Grygorii said, it would be useful if you add "if:then:" case constraining it per implementation (as I understood from commit msg only some use double mapping). This looks like: https://elixir.bootlin.com/linux/v5.18-rc2/source/Documentation/devicetree/bindings/clock/samsung,exynos7885-clock.yaml#L53 Similarly should be done for clocks, unless it's impossible (same compatible uses different setups of clocks). BTW, it's a bit confusing it is not a v2... Best regards, Krzysztof