From: Can Guo <can.guo@oss.qualcomm.com>
To: Conor Dooley <conor@kernel.org>
Cc: bvanassche@acm.org, beanhuo@micron.com, peter.wang@mediatek.com,
martin.petersen@oracle.com, mani@kernel.org,
linux-scsi@vger.kernel.org, Alim Akhtar <alim.akhtar@samsung.com>,
Avri Altman <avri.altman@wdc.com>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Ram Kumar Dwivedi <quic_rdwivedi@quicinc.com>,
Zhaoming Luo <zhml@posteo.com>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>,
open list <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 1/2] dt-bindings: ufs: Document static TX Equalization settings properties
Date: Sat, 2 May 2026 17:30:35 +0800 [thread overview]
Message-ID: <3f649e2c-c6b6-4547-8920-23886074ef60@oss.qualcomm.com> (raw)
In-Reply-To: <20260501-exhale-nutshell-3d80a8a2d791@spud>
Hi Conor,
On 5/2/2026 1:02 AM, Conor Dooley wrote:
> On Fri, May 01, 2026 at 06:44:17AM -0700, Can Guo wrote:
>> HW design team usually provides static TX Equalization settings based on
>> PCB board characteristics. These settings can be passed from the device
>> tree to configure the TX Equalization parameters (PreShoot, DeEmphasis,
>> and PreCodeEn) for Host and Device across different HS gears.
> I'm not familiar enough with ufs stuff to tell, but this commit message
> sounds very qcom specific, but this is being added to a common file.
> I'd like to see a lot more detail in the commit message, detailing why
> this is truly applicable across IP vendors.
Thanks for raising this point. I agree the current commit message is too
narrow and I will
fix it in the next version.
This binding is intended to be vendor-neutral. The DT properties
describe board-level
SI characterization data (per-gear/per-lane TX EQ values), not
Qualcomm-specific controller
internals.
The tuple (PreShoot, DeEmphasis, PreCodeEn) is defined by the UFS link
specs (MIPI UniPro
ver 3.0 & M-PHY ver 6.0), so the representation is generic and
applicable to any UFS host
that supports TX EQ.
This is also consistent with existing kernel practice in PCIe, where
board-provided Equalization
data is parsed from DT (see `of_pci_get_equalization_presets()` in
`drivers/pci/of.c`).
I will update the commit message to explicitly describe this
cross-vendor scope and to
clarify precedence: when adaptive TX EQ is enabled, DT static settings
are fallback values
and can be overridden by retrieved/trained TX EQ settings.
Thanks,
Can Guo.
>
>> Add patternProperties for txeq-settings-g[1-6] to support specifying
>> static TX Equalization settings.
>>
>> Signed-off-by: Can Guo <can.guo@oss.qualcomm.com>
>> ---
>> Documentation/devicetree/bindings/ufs/ufs-common.yaml | 11 +++++++++++
>> 1 file changed, 11 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/ufs/ufs-common.yaml b/Documentation/devicetree/bindings/ufs/ufs-common.yaml
>> index ed97f5682509..bc83948fc168 100644
>> --- a/Documentation/devicetree/bindings/ufs/ufs-common.yaml
>> +++ b/Documentation/devicetree/bindings/ufs/ufs-common.yaml
>> @@ -105,6 +105,17 @@ properties:
>> Restricts the UFS controller to rate-a or rate-b for both TX and
>> RX directions.
>>
>> +patternProperties:
>> + "^txeq-settings-g[1-6]$":
>> + $ref: /schemas/types.yaml#/definitions/uint32-array
>> + minItems: 6
>> + maxItems: 12
>> + description: |
>> + Static TX Equalization settings for High Speed (HS) gears.
>> + The settings are specified as an array of tuples (PreShoot, DeEmphasis, PrecodeEn).
>> + The array must contain these tuples in the following order:
>> + Host Lane 0, [Host Lane 1], Device Lane 0, [Device Lane 1].
>> +
>> dependencies:
>> freq-table-hz: [ clocks ]
>> operating-points-v2: [ clocks, clock-names ]
>> --
>> 2.34.1
>>
prev parent reply other threads:[~2026-05-02 9:31 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20260501134418.863432-1-can.guo@oss.qualcomm.com>
2026-05-01 13:44 ` [PATCH 1/2] dt-bindings: ufs: Document static TX Equalization settings properties Can Guo
2026-05-01 17:02 ` Conor Dooley
2026-05-02 9:30 ` Can Guo [this message]
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