From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 56EFCC433EF for ; Thu, 14 Jul 2022 01:10:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231268AbiGNBKL (ORCPT ); Wed, 13 Jul 2022 21:10:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49948 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229492AbiGNBKK (ORCPT ); Wed, 13 Jul 2022 21:10:10 -0400 X-Greylist: delayed 469 seconds by postgrey-1.37 at lindbergh.monkeyblade.net; Wed, 13 Jul 2022 18:10:09 PDT Received: from extserv.mm-sol.com (ns.mm-sol.com [37.157.136.199]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EF96A20190 for ; Wed, 13 Jul 2022 18:10:09 -0700 (PDT) Received: from [192.168.1.11] (unknown [195.24.90.54]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (Client did not present a certificate) (Authenticated sender: svarbanov@mm-sol.com) by extserv.mm-sol.com (Postfix) with ESMTPSA id 3ED2BD2EE; Thu, 14 Jul 2022 04:02:16 +0300 (EEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=mm-sol.com; s=201706; t=1657760537; bh=VKchntFKKIUycsNptcWL+GET5RQN91ySF9YKBZI59U8=; h=Date:Subject:To:Cc:From:From; b=kFL5y7CcinGaYD2ZR82z6bnWSEnexqR1IRKx6ZTkqBpUM/a7bNn91RNeWUpXyQ+NX QnH3RbHDlQPd5WSf3vglAbAXnisasq0o+ubBrfFkJyO7GG8Z3D9HOkv2J9xX2idV/m ekJSB/sW1RqW5cxwD8w51d90z7iozD4DbxevTAgOOKGz4D8ICZItUomtmI1blDEtxC PB+KVvV2UoLEdwQ99mctis3Lf6AWSccQoHFLh3B/6fzlB/KPpfqLg5U/kl29JLzufi T+nePakQWgkjwA6mhcMsG4RVUWvPW8pR90pjv7l3FTiTqR1Iaz6fVicH+sG9WT8+4d grpaEy//Tyvuw== Message-ID: <3f9e1c18-bc61-8690-5427-ba8dc5fad7ad@mm-sol.com> Date: Thu, 14 Jul 2022 04:02:13 +0300 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.9.1 Subject: Re: [PATCH v17 5/6] dt-bindings: PCI: qcom: Support additional MSI interrupts Content-Language: en-US To: Dmitry Baryshkov , Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Jingoo Han , Gustavo Pimentel , Lorenzo Pieralisi , Bjorn Helgaas , Manivannan Sadhasivam Cc: Vinod Koul , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, Johan Hovold , Krzysztof Kozlowski , Rob Herring References: <20220707134733.2436629-1-dmitry.baryshkov@linaro.org> <20220707134733.2436629-6-dmitry.baryshkov@linaro.org> From: Stanimir Varbanov In-Reply-To: <20220707134733.2436629-6-dmitry.baryshkov@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 7/7/22 16:47, Dmitry Baryshkov wrote: > On Qualcomm platforms each group of 32 MSI vectors is routed to the > separate GIC interrupt. Document mapping of additional interrupts. > > Reviewed-by: Krzysztof Kozlowski > Reviewed-by: Rob Herring > Signed-off-by: Dmitry Baryshkov > --- > .../devicetree/bindings/pci/qcom,pcie.yaml | 51 +++++++++++++++++-- > 1 file changed, 48 insertions(+), 3 deletions Acked-by: Stanimir Varbanov -- regards, Stan