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From: Krzysztof Kozlowski <krzk@kernel.org>
To: "Maíra Canal" <mcanal@igalia.com>,
	"Melissa Wen" <mwen@igalia.com>, "Iago Toral" <itoral@igalia.com>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Nicolas Saenz Julienne" <nsaenz@kernel.org>
Cc: Phil Elwell <phil@raspberrypi.com>,
	dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
	kernel-dev@igalia.com
Subject: Re: [PATCH v4 4/7] dt-bindings: gpu: v3d: Add per-compatible register restrictions
Date: Thu, 13 Mar 2025 16:03:17 +0100	[thread overview]
Message-ID: <3fbaa5ed-e70f-4293-99d0-faf22f3c4adf@kernel.org> (raw)
In-Reply-To: <20250313-v3d-gpu-reset-fixes-v4-4-c1e780d8e096@igalia.com>

On 13/03/2025 15:43, Maíra Canal wrote:
> In order to enforce per-SoC register rules, add per-compatible
> restrictions. V3D 3.3 (represented by brcm,7268-v3d) has a cache
> controller (GCA), which is not present in other V3D generations.
> Declaring these differences helps ensure the DTB accurately reflect
> the hardware design.
> 
> While not ideal, this commit keeps the register order flexible for
> brcm,7268-v3d with the goal to keep the ABI backwards compatible.
> 
> Signed-off-by: Maíra Canal <mcanal@igalia.com>
> ---
>  .../devicetree/bindings/gpu/brcm,bcm-v3d.yaml      | 73 ++++++++++++++++++----
>  1 file changed, 61 insertions(+), 12 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml b/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml
> index dc078ceeca9ac3447ba54a7c8830821f0b2a7f9f..9867b617c60c6fe34a0f88a3ee2f581a94b69a5c 100644
> --- a/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml
> +++ b/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml
> @@ -22,20 +22,10 @@ properties:
>        - brcm,7278-v3d
>  
>    reg:
> -    items:
> -      - description: hub register (required)
> -      - description: core0 register (required)
> -      - description: GCA cache controller register (if GCA controller present)
> -      - description: bridge register (if no external reset controller)
> -    minItems: 2

Widest constraints always stay here, so you cannot remove minItems.

> +    maxItems: 4

>  
>    reg-names:
> -    items:
> -      - const: hub
> -      - const: core0
> -      - enum: [ bridge, gca ]
> -      - enum: [ bridge, gca ]
> -    minItems: 2

Same problem.

> +    maxItems: 4
>  
>    interrupts:
>      items:
> @@ -58,6 +48,65 @@ required:
>    - reg-names
>    - interrupts

...

> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: brcm,7268-v3d
> +    then:
> +      properties:
> +        reg:
> +          items:
> +            - description: hub register
> +            - description: core0 register
> +            - description: GCA cache controller register
> +            - description: bridge register (if no external reset controller)
> +          minItems: 3
> +        reg-names:
> +          items:
> +            - const: hub
> +            - const: core0
> +            - enum: [ bridge, gca ]

So GCA is always there? Then this should be just 'gca'. Your list for
'reg' already says that third item must be GCA. I understand that you do
not want to affect the ABI, but it already kind of is with enforcing GCA
in 'reg'.

I anyway do not understand why 'gca' or 'bridge' are supposed to be
optional. Does the given SoC differ between boards? What is the external
reset controller here? External like outside of SoC?

Best regards,
Krzysztof

  reply	other threads:[~2025-03-13 15:03 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-13 14:43 [PATCH v4 0/7] drm/v3d: Fix GPU reset issues on the Raspberry Pi 5 Maíra Canal
2025-03-13 14:43 ` [PATCH v4 1/7] drm/v3d: Don't run jobs that have errors flagged in its fence Maíra Canal
2025-03-13 20:20   ` Maíra Canal
2025-03-13 14:43 ` [PATCH v4 2/7] drm/v3d: Set job pointer to NULL when the job's fence has an error Maíra Canal
2025-03-13 14:43 ` [PATCH v4 3/7] drm/v3d: Associate a V3D tech revision to all supported devices Maíra Canal
2025-03-13 14:43 ` [PATCH v4 4/7] dt-bindings: gpu: v3d: Add per-compatible register restrictions Maíra Canal
2025-03-13 15:03   ` Krzysztof Kozlowski [this message]
2025-03-13 19:04     ` Maíra Canal
2025-03-15  9:52       ` Stefan Wahren
2025-03-15 12:17         ` Maíra Canal
2025-03-15 14:44           ` Florian Fainelli
2025-03-13 14:43 ` [PATCH v4 5/7] dt-bindings: gpu: v3d: Add SMS register to BCM2712 compatible Maíra Canal
2025-03-13 15:03   ` Krzysztof Kozlowski
2025-03-13 14:43 ` [PATCH v4 6/7] drm/v3d: Use V3D_SMS registers for power on/off and reset on V3D 7.x Maíra Canal
2025-03-13 14:43 ` [PATCH v4 7/7] dt-bindings: gpu: Add V3D driver maintainer as DT maintainer Maíra Canal

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