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From: Heiko Stuebner <heiko@sntech.de>
To: dmitry.baryshkov@oss.qualcomm.com, Andy Yan <andyshrk@163.com>
Cc: krzk+dt@kernel.org, conor+dt@kernel.org,
	cristian.ciocaltea@collabora.com,
	Laurent.pinchart@ideasonboard.com, mripard@kernel.org,
	hjc@rock-chips.com, robh@kernel.org,
	sebastian.reichel@collabora.com, tzimmermann@suse.de,
	devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org,
	Andy Yan <andy.yan@rock-chips.com>
Subject: Re: [PATCH 2/5] drm/bridge: synopsys: dw-dp: Set pixel mode by platform data
Date: Tue, 20 Jan 2026 11:43:41 +0100	[thread overview]
Message-ID: <4083071.q0ZmV6gNhb@phil> (raw)
In-Reply-To: <20260109080054.228671-3-andyshrk@163.com>

Am Freitag, 9. Januar 2026, 09:00:45 Mitteleuropäische Normalzeit schrieb Andy Yan:
> From: Andy Yan <andy.yan@rock-chips.com>
> 
> The DW DisplayPort hardware block can be configured to work in single,
> dual,quad pixel mode on differnt platforms, so make the pixel mode set
> by plat_data to support the upcoming rk3576 variant.
> 
> Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

While Dmitry helped a lot with looking at bridge drivers recently,
I think your recipient list does miss a number of other people
listed as bridge reviewers/maintainers.

$ scripts/get_maintainer.pl drivers/gpu/drm/bridge
Andrzej Hajda <andrzej.hajda@intel.com> (maintainer:DRM DRIVERS FOR BRIDGE CHIPS)
Neil Armstrong <neil.armstrong@linaro.org> (maintainer:DRM DRIVERS FOR BRIDGE CHIPS)
Robert Foss <rfoss@kernel.org> (maintainer:DRM DRIVERS FOR BRIDGE CHIPS)
Laurent Pinchart <Laurent.pinchart@ideasonboard.com> (reviewer:DRM DRIVERS FOR BRIDGE CHIPS)
Jonas Karlman <jonas@kwiboo.se> (reviewer:DRM DRIVERS FOR BRIDGE CHIPS)
Jernej Skrabec <jernej.skrabec@gmail.com> (reviewer:DRM DRIVERS FOR BRIDGE CHIPS)

As you'll need to do a v2 for the binding, please add the missing people
to the recipients.


For the change itself, can you improve the commit message a bit.

I assume the Single/Dual/Quad-Pixel config is a real hardware-feature
that is set when the IP is integrated into the soc? Or this a runtime
setting and a soc can support multiple output variants?


Thanks
Heiko



  parent reply	other threads:[~2026-01-20 10:43 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-09  8:00 [PATCH 0/5] Add DisplayPort support for rk3576 Andy Yan
2026-01-09  8:00 ` [PATCH 1/5] dt-bindings: display: rockchip: Add rk3576 DisplayPort Andy Yan
2026-01-13 21:33   ` Sebastian Reichel
2026-01-15 17:18     ` Rob Herring
2026-01-09  8:00 ` [PATCH 2/5] drm/bridge: synopsys: dw-dp: Set pixel mode by platform data Andy Yan
2026-01-13 21:36   ` Sebastian Reichel
2026-01-20 10:43   ` Heiko Stuebner [this message]
2026-01-09  8:00 ` [PATCH 3/5] drm/bridge: synopsys: dw-dp: Make i2s/spdif clk optional Andy Yan
2026-01-13 21:37   ` Sebastian Reichel
2026-01-09  8:00 ` [PATCH 4/5] drm/rockchip: dw_dp: Add DisplayPort support for rk3576 Andy Yan
2026-01-13 21:37   ` Sebastian Reichel
2026-01-09  8:00 ` [PATCH 5/5] arm64: dts: rockchip: Add DisplayPort dt node " Andy Yan
2026-01-13 21:43   ` Sebastian Reichel
2026-01-13 21:51 ` [PATCH 0/5] Add DisplayPort support " Sebastian Reichel
2026-01-14  1:42   ` Chaoyi Chen

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