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* [PATCH v2 0/2] interconnect: qcom: sdx75: Drop QP0 interconnect and BCM nodes
@ 2025-09-26  6:42 Manivannan Sadhasivam via B4 Relay
  2025-09-26  6:42 ` [PATCH v2 1/2] interconnect: qcom: sdx75: Drop QPIC " Manivannan Sadhasivam via B4 Relay
  2025-09-26  6:42 ` [PATCH v2 2/2] dt-bindings: interconnect: qcom: Drop QPIC_CORE IDs Manivannan Sadhasivam via B4 Relay
  0 siblings, 2 replies; 6+ messages in thread
From: Manivannan Sadhasivam via B4 Relay @ 2025-09-26  6:42 UTC (permalink / raw)
  To: Georgi Djakov, Rohit Agarwal, Konrad Dybcio, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley
  Cc: linux-arm-msm, linux-pm, linux-kernel, Krzysztof Kozlowski,
	devicetree, Manivannan Sadhasivam, Raviteja Laggyshetty,
	Lakshmi Sowjanya D, Manivannan Sadhasivam, stable

Hi,

This series drops the QPIC interconnect and BCM nodes for the SDX75 SoC. The
reason is that this QPIC BCM resource is already defined as a RPMh clock in
clk-rpmh driver as like other SDX SoCs. So it is wrong to describe the same
resource in two different providers.

Also, without this series, the NAND driver fails to probe on SDX75 as the
interconnect sync state disables the QPIC nodes as there were no clients voting
for this ICC resource. However, the NAND driver had already voted for this BCM
resource through the clk-rpmh driver. Since both votes come from Linux, RPMh was
unable to distinguish between these two and ends up disabling the resource
during sync state.

Cc: linux-arm-msm@vger.kernel.org
Cc: linux-pm@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: devicetree@vger.kernel.org
Cc: Manivannan Sadhasivam <mani@kernel.org>
Cc: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
Cc: Lakshmi Sowjanya D <quic_laksd@quicinc.com>
To: Georgi Djakov <djakov@kernel.org>
To: Konrad Dybcio <konradybcio@kernel.org>
To: Rob Herring <robh@kernel.org>
To: Krzysztof Kozlowski <krzk+dt@kernel.org>
To: Conor Dooley <conor+dt@kernel.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>

Changes in v2:

- Taken over the series from Raviteja
- Reordered the patches to avoid breaking build
- Improved the patch descriptions and kept the values for other defines
  unchanged

---
Raviteja Laggyshetty (2):
      interconnect: qcom: sdx75: Drop QPIC interconnect and BCM nodes
      dt-bindings: interconnect: qcom: Drop QPIC_CORE IDs

 drivers/interconnect/qcom/sdx75.c             | 26 --------------------------
 drivers/interconnect/qcom/sdx75.h             |  2 --
 include/dt-bindings/interconnect/qcom,sdx75.h |  2 --
 3 files changed, 30 deletions(-)
---
base-commit: 8f5ae30d69d7543eee0d70083daf4de8fe15d585
change-id: 20250926-sdx75-icc-67c20b3de84a

Best regards,
-- 
Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>



^ permalink raw reply	[flat|nested] 6+ messages in thread

* [PATCH v2 1/2] interconnect: qcom: sdx75: Drop QPIC interconnect and BCM nodes
  2025-09-26  6:42 [PATCH v2 0/2] interconnect: qcom: sdx75: Drop QP0 interconnect and BCM nodes Manivannan Sadhasivam via B4 Relay
@ 2025-09-26  6:42 ` Manivannan Sadhasivam via B4 Relay
  2025-09-26 13:46   ` Konrad Dybcio
  2025-09-26  6:42 ` [PATCH v2 2/2] dt-bindings: interconnect: qcom: Drop QPIC_CORE IDs Manivannan Sadhasivam via B4 Relay
  1 sibling, 1 reply; 6+ messages in thread
From: Manivannan Sadhasivam via B4 Relay @ 2025-09-26  6:42 UTC (permalink / raw)
  To: Georgi Djakov, Rohit Agarwal, Konrad Dybcio, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley
  Cc: linux-arm-msm, linux-pm, linux-kernel, Krzysztof Kozlowski,
	devicetree, Manivannan Sadhasivam, Raviteja Laggyshetty,
	Lakshmi Sowjanya D, Manivannan Sadhasivam, stable

From: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>

As like other SDX SoCs, SDX75 SoC's QPIC BCM resource was modeled as a
RPMh clock in clk-rpmh driver. However, for SDX75, this resource was also
described as an interconnect and BCM node mistakenly. It is incorrect to
describe the same resource in two different providers, as it will lead to
votes from clients overriding each other.

Hence, drop the QPIC interconnect and BCM nodes and let the clients use
clk-rpmh driver to vote for this resource.

Without this change, the NAND driver fails to probe on SDX75, as the
interconnect sync state disables the QPIC nodes as there were no clients
voting for this ICC resource. However, the NAND driver had already voted
for this BCM resource through the clk-rpmh driver. Since both votes come
from Linux, RPMh was unable to distinguish between these two and ends up
disabling the QPIC resource during sync state.

Cc: stable@vger.kernel.org
Fixes: 3642b4e5cbfe ("interconnect: qcom: Add SDX75 interconnect provider driver")
Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
[mani: dropped the reference to bcm_qp0, reworded description]
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
---
 drivers/interconnect/qcom/sdx75.c | 26 --------------------------
 drivers/interconnect/qcom/sdx75.h |  2 --
 2 files changed, 28 deletions(-)

diff --git a/drivers/interconnect/qcom/sdx75.c b/drivers/interconnect/qcom/sdx75.c
index 7ef1f17f3292e15959cb06e3d8d8c5f3c6ecd060..2def75f67eb8e0adf0a14a1bd13f24c401cc722a 100644
--- a/drivers/interconnect/qcom/sdx75.c
+++ b/drivers/interconnect/qcom/sdx75.c
@@ -16,15 +16,6 @@
 #include "icc-rpmh.h"
 #include "sdx75.h"
 
-static struct qcom_icc_node qpic_core_master = {
-	.name = "qpic_core_master",
-	.id = SDX75_MASTER_QPIC_CORE,
-	.channels = 1,
-	.buswidth = 4,
-	.num_links = 1,
-	.links = { SDX75_SLAVE_QPIC_CORE },
-};
-
 static struct qcom_icc_node qup0_core_master = {
 	.name = "qup0_core_master",
 	.id = SDX75_MASTER_QUP_CORE_0,
@@ -375,14 +366,6 @@ static struct qcom_icc_node xm_usb3 = {
 	.links = { SDX75_SLAVE_A1NOC_CFG },
 };
 
-static struct qcom_icc_node qpic_core_slave = {
-	.name = "qpic_core_slave",
-	.id = SDX75_SLAVE_QPIC_CORE,
-	.channels = 1,
-	.buswidth = 4,
-	.num_links = 0,
-};
-
 static struct qcom_icc_node qup0_core_slave = {
 	.name = "qup0_core_slave",
 	.id = SDX75_SLAVE_QUP_CORE_0,
@@ -831,12 +814,6 @@ static struct qcom_icc_bcm bcm_mc0 = {
 	.nodes = { &ebi },
 };
 
-static struct qcom_icc_bcm bcm_qp0 = {
-	.name = "QP0",
-	.num_nodes = 1,
-	.nodes = { &qpic_core_slave },
-};
-
 static struct qcom_icc_bcm bcm_qup0 = {
 	.name = "QUP0",
 	.keepalive = true,
@@ -898,14 +875,11 @@ static struct qcom_icc_bcm bcm_sn4 = {
 };
 
 static struct qcom_icc_bcm * const clk_virt_bcms[] = {
-	&bcm_qp0,
 	&bcm_qup0,
 };
 
 static struct qcom_icc_node * const clk_virt_nodes[] = {
-	[MASTER_QPIC_CORE] = &qpic_core_master,
 	[MASTER_QUP_CORE_0] = &qup0_core_master,
-	[SLAVE_QPIC_CORE] = &qpic_core_slave,
 	[SLAVE_QUP_CORE_0] = &qup0_core_slave,
 };
 
diff --git a/drivers/interconnect/qcom/sdx75.h b/drivers/interconnect/qcom/sdx75.h
index 24e88715992010d934a1a630979f864af3a8426c..34f51add59dc008c7378dec3c1409f0f55b93056 100644
--- a/drivers/interconnect/qcom/sdx75.h
+++ b/drivers/interconnect/qcom/sdx75.h
@@ -33,7 +33,6 @@
 #define SDX75_MASTER_QDSS_ETR			24
 #define SDX75_MASTER_QDSS_ETR_1			25
 #define SDX75_MASTER_QPIC			26
-#define SDX75_MASTER_QPIC_CORE			27
 #define SDX75_MASTER_QUP_0			28
 #define SDX75_MASTER_QUP_CORE_0			29
 #define SDX75_MASTER_SDCC_1			30
@@ -76,7 +75,6 @@
 #define SDX75_SLAVE_QDSS_CFG			67
 #define SDX75_SLAVE_QDSS_STM			68
 #define SDX75_SLAVE_QPIC			69
-#define SDX75_SLAVE_QPIC_CORE			70
 #define SDX75_SLAVE_QUP_0			71
 #define SDX75_SLAVE_QUP_CORE_0			72
 #define SDX75_SLAVE_SDCC_1			73

-- 
2.48.1



^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH v2 2/2] dt-bindings: interconnect: qcom: Drop QPIC_CORE IDs
  2025-09-26  6:42 [PATCH v2 0/2] interconnect: qcom: sdx75: Drop QP0 interconnect and BCM nodes Manivannan Sadhasivam via B4 Relay
  2025-09-26  6:42 ` [PATCH v2 1/2] interconnect: qcom: sdx75: Drop QPIC " Manivannan Sadhasivam via B4 Relay
@ 2025-09-26  6:42 ` Manivannan Sadhasivam via B4 Relay
  2025-10-02  1:58   ` Rob Herring (Arm)
  1 sibling, 1 reply; 6+ messages in thread
From: Manivannan Sadhasivam via B4 Relay @ 2025-09-26  6:42 UTC (permalink / raw)
  To: Georgi Djakov, Rohit Agarwal, Konrad Dybcio, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley
  Cc: linux-arm-msm, linux-pm, linux-kernel, Krzysztof Kozlowski,
	devicetree, Manivannan Sadhasivam, Raviteja Laggyshetty,
	Lakshmi Sowjanya D, Manivannan Sadhasivam

From: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>

As like other SDX targets, SDX75 QPIC BCM resource is also modeled as a
RPMh clock in clk-rpmh driver. However, for SDX75, this resource was also
described as an interconnect node mistakenly.

Hence, drop the QPIC interconnect IDs and let the clients use clk-rpmh
driver to vote for this resource.

Even though this change is an ABI break, it is necessary to avoid
describing the same resource provider in two different drivers, as it may
lead to votes from clients overriding each other.

Fixes: 956329ec7c5e ("dt-bindings: interconnect: Add compatibles for SDX75")
Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
[mani: kept the QUP defines value unchanged]
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
---
 include/dt-bindings/interconnect/qcom,sdx75.h | 2 --
 1 file changed, 2 deletions(-)

diff --git a/include/dt-bindings/interconnect/qcom,sdx75.h b/include/dt-bindings/interconnect/qcom,sdx75.h
index e903f5f3dd8f63b257222b78e8ea41143d3dc86c..0e19ee8f168702a364f4101991ce9a6213da2eea 100644
--- a/include/dt-bindings/interconnect/qcom,sdx75.h
+++ b/include/dt-bindings/interconnect/qcom,sdx75.h
@@ -6,9 +6,7 @@
 #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SDX75_H
 #define __DT_BINDINGS_INTERCONNECT_QCOM_SDX75_H
 
-#define MASTER_QPIC_CORE		0
 #define MASTER_QUP_CORE_0		1
-#define SLAVE_QPIC_CORE			2
 #define SLAVE_QUP_CORE_0		3
 
 #define MASTER_LLCC			0

-- 
2.48.1



^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [PATCH v2 1/2] interconnect: qcom: sdx75: Drop QPIC interconnect and BCM nodes
  2025-09-26  6:42 ` [PATCH v2 1/2] interconnect: qcom: sdx75: Drop QPIC " Manivannan Sadhasivam via B4 Relay
@ 2025-09-26 13:46   ` Konrad Dybcio
  2025-09-29  5:07     ` Lakshmi Sowjanya D (QUIC)
  0 siblings, 1 reply; 6+ messages in thread
From: Konrad Dybcio @ 2025-09-26 13:46 UTC (permalink / raw)
  To: manivannan.sadhasivam, Georgi Djakov, Rohit Agarwal,
	Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley
  Cc: linux-arm-msm, linux-pm, linux-kernel, Krzysztof Kozlowski,
	devicetree, Manivannan Sadhasivam, Raviteja Laggyshetty,
	Lakshmi Sowjanya D, stable

On 9/26/25 8:42 AM, Manivannan Sadhasivam via B4 Relay wrote:
> From: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
> 
> As like other SDX SoCs, SDX75 SoC's QPIC BCM resource was modeled as a
> RPMh clock in clk-rpmh driver. However, for SDX75, this resource was also
> described as an interconnect and BCM node mistakenly. It is incorrect to
> describe the same resource in two different providers, as it will lead to
> votes from clients overriding each other.
> 
> Hence, drop the QPIC interconnect and BCM nodes and let the clients use
> clk-rpmh driver to vote for this resource.
> 
> Without this change, the NAND driver fails to probe on SDX75, as the
> interconnect sync state disables the QPIC nodes as there were no clients
> voting for this ICC resource. However, the NAND driver had already voted
> for this BCM resource through the clk-rpmh driver. Since both votes come
> from Linux, RPMh was unable to distinguish between these two and ends up
> disabling the QPIC resource during sync state.
> 
> Cc: stable@vger.kernel.org
> Fixes: 3642b4e5cbfe ("interconnect: qcom: Add SDX75 interconnect provider driver")
> Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
> [mani: dropped the reference to bcm_qp0, reworded description]
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
> ---

Too bad no one noticed for the 2 years the platform has been upstream..

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

Konrad

^ permalink raw reply	[flat|nested] 6+ messages in thread

* RE: [PATCH v2 1/2] interconnect: qcom: sdx75: Drop QPIC interconnect and BCM nodes
  2025-09-26 13:46   ` Konrad Dybcio
@ 2025-09-29  5:07     ` Lakshmi Sowjanya D (QUIC)
  0 siblings, 0 replies; 6+ messages in thread
From: Lakshmi Sowjanya D (QUIC) @ 2025-09-29  5:07 UTC (permalink / raw)
  To: Konrad Dybcio, manivannan.sadhasivam@oss.qualcomm.com,
	Georgi Djakov, Rohit Agarwal, Konrad Dybcio, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley
  Cc: linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org,
	linux-kernel@vger.kernel.org, Krzysztof Kozlowski,
	devicetree@vger.kernel.org, Manivannan Sadhasivam,
	Raviteja Laggyshetty (QUIC), stable@vger.kernel.org



> -----Original Message-----
> From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> Sent: Friday, September 26, 2025 7:17 PM
> To: manivannan.sadhasivam@oss.qualcomm.com; Georgi Djakov
> <djakov@kernel.org>; Rohit Agarwal <quic_rohiagar@quicinc.com>; Konrad
> Dybcio <konradybcio@kernel.org>; Rob Herring <robh@kernel.org>; Krzysztof
> Kozlowski <krzk+dt@kernel.org>; Conor Dooley <conor+dt@kernel.org>
> Cc: linux-arm-msm@vger.kernel.org; linux-pm@vger.kernel.org; linux-
> kernel@vger.kernel.org; Krzysztof Kozlowski
> <krzysztof.kozlowski@linaro.org>; devicetree@vger.kernel.org; Manivannan
> Sadhasivam <mani@kernel.org>; Raviteja Laggyshetty (QUIC)
> <quic_rlaggysh@quicinc.com>; Lakshmi Sowjanya D (QUIC)
> <quic_laksd@quicinc.com>; stable@vger.kernel.org
> Subject: Re: [PATCH v2 1/2] interconnect: qcom: sdx75: Drop QPIC
> interconnect and BCM nodes
> 
> On 9/26/25 8:42 AM, Manivannan Sadhasivam via B4 Relay wrote:
> > From: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
> >
> > As like other SDX SoCs, SDX75 SoC's QPIC BCM resource was modeled as a
> > RPMh clock in clk-rpmh driver. However, for SDX75, this resource was
> > also described as an interconnect and BCM node mistakenly. It is
> > incorrect to describe the same resource in two different providers, as
> > it will lead to votes from clients overriding each other.
> >
> > Hence, drop the QPIC interconnect and BCM nodes and let the clients
> > use clk-rpmh driver to vote for this resource.
> >
> > Without this change, the NAND driver fails to probe on SDX75, as the
> > interconnect sync state disables the QPIC nodes as there were no
> > clients voting for this ICC resource. However, the NAND driver had
> > already voted for this BCM resource through the clk-rpmh driver. Since
> > both votes come from Linux, RPMh was unable to distinguish between
> > these two and ends up disabling the QPIC resource during sync state.
> >
> > Cc: stable@vger.kernel.org
> > Fixes: 3642b4e5cbfe ("interconnect: qcom: Add SDX75 interconnect
> > provider driver")
> > Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
> > [mani: dropped the reference to bcm_qp0, reworded description]
> > Signed-off-by: Manivannan Sadhasivam
> > <manivannan.sadhasivam@oss.qualcomm.com>
> > ---
> 
> Too bad no one noticed for the 2 years the platform has been upstream..
> 
> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> 
> Konrad

Tested-by: Lakshmi Sowjanya D <quic_laksd@quicinc.com>  # on SDX75

Regards,
Lakshmi Sowjanya D



^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH v2 2/2] dt-bindings: interconnect: qcom: Drop QPIC_CORE IDs
  2025-09-26  6:42 ` [PATCH v2 2/2] dt-bindings: interconnect: qcom: Drop QPIC_CORE IDs Manivannan Sadhasivam via B4 Relay
@ 2025-10-02  1:58   ` Rob Herring (Arm)
  0 siblings, 0 replies; 6+ messages in thread
From: Rob Herring (Arm) @ 2025-10-02  1:58 UTC (permalink / raw)
  To: Manivannan Sadhasivam
  Cc: Krzysztof Kozlowski, devicetree, linux-pm, Manivannan Sadhasivam,
	linux-kernel, Rohit Agarwal, linux-arm-msm, Raviteja Laggyshetty,
	Konrad Dybcio, Lakshmi Sowjanya D, Krzysztof Kozlowski,
	Georgi Djakov, Conor Dooley


On Fri, 26 Sep 2025 12:12:10 +0530, Manivannan Sadhasivam wrote:
> From: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
> 
> As like other SDX targets, SDX75 QPIC BCM resource is also modeled as a
> RPMh clock in clk-rpmh driver. However, for SDX75, this resource was also
> described as an interconnect node mistakenly.
> 
> Hence, drop the QPIC interconnect IDs and let the clients use clk-rpmh
> driver to vote for this resource.
> 
> Even though this change is an ABI break, it is necessary to avoid
> describing the same resource provider in two different drivers, as it may
> lead to votes from clients overriding each other.
> 
> Fixes: 956329ec7c5e ("dt-bindings: interconnect: Add compatibles for SDX75")
> Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
> [mani: kept the QUP defines value unchanged]
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
> ---
>  include/dt-bindings/interconnect/qcom,sdx75.h | 2 --
>  1 file changed, 2 deletions(-)
> 

Acked-by: Rob Herring (Arm) <robh@kernel.org>


^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2025-10-02  1:58 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
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2025-09-26  6:42 [PATCH v2 0/2] interconnect: qcom: sdx75: Drop QP0 interconnect and BCM nodes Manivannan Sadhasivam via B4 Relay
2025-09-26  6:42 ` [PATCH v2 1/2] interconnect: qcom: sdx75: Drop QPIC " Manivannan Sadhasivam via B4 Relay
2025-09-26 13:46   ` Konrad Dybcio
2025-09-29  5:07     ` Lakshmi Sowjanya D (QUIC)
2025-09-26  6:42 ` [PATCH v2 2/2] dt-bindings: interconnect: qcom: Drop QPIC_CORE IDs Manivannan Sadhasivam via B4 Relay
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