Re: [PATCH v3 2/2] i2c: qcom-target: Add driver for Qualcomm I2C target controller

[Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com>]

On 8/25/2026 3:11 PM, Konrad Dybcio wrote:
> On 8/13/26 5:52 PM, Viken Dadhaniya wrote:
>> QDU1000 and related Qualcomm SoCs include a dedicated I2C target
>> controller that operates exclusively in target mode. The existing
>> Qualcomm I2C controller drivers (GENI, QUP) are master-only and cannot
>> serve systems where the SoC must respond as an I2C target on the bus.
> 
> [...]
> 
>> +	ret = clk_prepare_enable(target->xo_clk);
>> +	if (ret)
>> +		return dev_err_probe(dev, ret, "failed to enable XO clock\n");
>> +
>> +	ret = clk_prepare_enable(target->ahb_clk);
>> +	if (ret) {
>> +		clk_disable_unprepare(target->xo_clk);
>> +		return dev_err_probe(dev, ret, "failed to enable AHB clock\n");
>> +	}
> 
> Does this need an OPP table? Presumably we need a power vote for each bus
> frequency

The xo and ahb are simple gate clocks with no rate states —
xo runs at a fixed 19.2 MHz and the ahb rate is fabric-managed.
Since this is a target-only controller the master drives bus speed,
so there is nothing for us to scale. OPP is not needed here

> 
> Konrad