From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6C98AECAAD3 for ; Fri, 9 Sep 2022 14:12:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229673AbiIIOMy (ORCPT ); Fri, 9 Sep 2022 10:12:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34246 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229544AbiIIOMy (ORCPT ); Fri, 9 Sep 2022 10:12:54 -0400 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3A6ACA50F5 for ; Fri, 9 Sep 2022 07:12:51 -0700 (PDT) Received: from ip5b412258.dynamic.kabel-deutschland.de ([91.65.34.88] helo=diego.localnet) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1oWekR-0005nv-Fv; Fri, 09 Sep 2022 16:12:47 +0200 From: Heiko =?ISO-8859-1?Q?St=FCbner?= To: linux-rockchip@lists.infradead.org, Chris Morgan Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, cl@rock-chips.com, s.hauer@pengutronix.de, pgwipeout@gmail.com, vkoul@kernel.org, kishon@ti.com, krzysztof.kozlowski+dt@linaro.org, robh+dt@kernel.org, daniel@ffwll.ch, airlied@linux.ie, hjc@rock-chips.com, Chris Morgan Subject: Re: [PATCH v2 4/5] phy/rockchip: inno-dsidphy: Add support for rk3568 Date: Fri, 09 Sep 2022 16:12:46 +0200 Message-ID: <42364235.doPnVEEUbh@diego> In-Reply-To: <20220906174823.28561-5-macroalpha82@gmail.com> References: <20220906174823.28561-1-macroalpha82@gmail.com> <20220906174823.28561-5-macroalpha82@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Am Dienstag, 6. September 2022, 19:48:22 CEST schrieb Chris Morgan: > From: Chris Morgan > > Add support for the Rockchip RK3568 DSI-DPHY. Registers were taken from > the BSP kernel driver and wherever possible cross referenced with the > TRM. With the amount of refactoring done below, I'd expect a bit more introductory text here ;-) I.e. about older variants of the phy only supporting 1GHz rates and newer ones supporting up to 2.5GHz and that you refactor some things to make both variants work. > > Signed-off-by: Chris Morgan > --- > .../phy/rockchip/phy-rockchip-inno-dsidphy.c | 204 ++++++++++++++---- > 1 file changed, 158 insertions(+), 46 deletions(-) > > diff --git a/drivers/phy/rockchip/phy-rockchip-inno-dsidphy.c b/drivers/phy/rockchip/phy-rockchip-inno-dsidphy.c > index 630e01b5c19b..2c5847faff63 100644 > --- a/drivers/phy/rockchip/phy-rockchip-inno-dsidphy.c > +++ b/drivers/phy/rockchip/phy-rockchip-inno-dsidphy.c > @@ -84,9 +84,25 @@ > #define DATA_LANE_0_SKEW_PHASE_MASK GENMASK(2, 0) > #define DATA_LANE_0_SKEW_PHASE(x) UPDATE(x, 2, 0) > /* Analog Register Part: reg08 */ > +#define PLL_POST_DIV_ENABLE_MASK BIT(5) > +#define PLL_POST_DIV_ENABLE BIT(5) > #define SAMPLE_CLOCK_DIRECTION_MASK BIT(4) > #define SAMPLE_CLOCK_DIRECTION_REVERSE BIT(4) > #define SAMPLE_CLOCK_DIRECTION_FORWARD 0 > +#define LOWFRE_EN_MASK BIT(5) PLL_POST_DIR_ENABLE above also is BIT(5) ... is this correct? otherwise the changes look great. Heiko