From: Dinh Nguyen <dinguyen@kernel.org>
To: thor.thayer@linux.intel.com, robh+dt@kernel.org, mark.rutland@arm.com
Cc: catalin.marinas@arm.com, will.deacon@arm.com,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
stable@vger.kernel.org
Subject: Re: [PATCH] ARM: dts: socfpga: Fix SDRAM node address for Arria10
Date: Fri, 26 Oct 2018 15:52:07 -0500 [thread overview]
Message-ID: <426902dc-4a25-9707-da45-8612ccbd674c@kernel.org> (raw)
In-Reply-To: <0e965db7-78e7-afba-2b6e-0ccd1b73ae36@linux.intel.com>
On 10/26/2018 03:14 PM, Thor Thayer wrote:
> Gentle ping.
>
> On 9/25/18 10:21 AM, thor.thayer@linux.intel.com wrote:
>> From: Thor Thayer <thor.thayer@linux.intel.com>
>>
>> The address in the SDRAM node was incorrect. Fix this to agree with the
>> correct address and to match the reg definition block.
>>
>> Cc: stable@vger.kernel.org
>> Fixes: 54b4a8f57848b("arm: socfpga: dts: Add Arria10 SDRAM EDAC DTS
>> support")
>> Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
>> ---
>> arch/arm/boot/dts/socfpga_arria10.dtsi | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
This is already in arm-soc/next/dt and should land in v4.20-rc1.
Dinh
prev parent reply other threads:[~2018-10-26 20:52 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-25 15:21 [PATCH] ARM: dts: socfpga: Fix SDRAM node address for Arria10 thor.thayer
2018-10-26 20:14 ` Thor Thayer
2018-10-26 20:52 ` Dinh Nguyen [this message]
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