From: Conor Dooley <conor@kernel.org>
To: Walker Chen <walker.chen@starfivetech.com>,
Conor Dooley <conor.dooley@microchip.com>
Cc: linux-riscv@lists.infradead.org, linux-pm@vger.kernel.org,
devicetree@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
"Rafael J . Wysocki" <rafael@kernel.org>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v1 3/4] soc: starfive: Add StarFive JH71XX pmu driver
Date: Thu, 01 Dec 2022 06:21:25 +0000 [thread overview]
Message-ID: <42D09618-DB39-4A8B-9327-4C6CC9DA2000@kernel.org> (raw)
In-Reply-To: <e0cf51d3-ba58-36a7-5c70-1d070e5fb12a@starfivetech.com>
Hey Walker,
Apologies for my formatting here.
On 1 December 2022 03:56:27 GMT, Walker Chen <walker.chen@starfivetech.com> wrote:
>On 2022/11/25 19:17, Conor Dooley wrote:
>> On Fri, Nov 25, 2022 at 06:04:59PM +0800, Walker Chen wrote:
>>> On 2022/11/19 8:24, Conor Dooley wrote:
>>> > On Fri, Nov 18, 2022 at 09:32:15PM +0800, Walker Chen wrote:
>>
>>> >> +void starfive_pmu_hw_event_turn_off(u32 mask)
>>> >> +{
>>> >> + pmu_writel(mask, HW_EVENT_TURN_OFF_MASK);
>>> >> +}
>>> >> +EXPORT_SYMBOL(starfive_pmu_hw_event_turn_off);
>>> >
>>> > Where are the users for these exports? Also, should they be exported as
>>> > GPL?
>>> >
>>> > Either way, what is the point of the extra layer of abstraction here
>>> > around the writel()?
>>>
>>> The two export functions are only prepared for GPU module. But accordint to
>>> the latest information, it seems that there is no open source plan for GPU.
>>> So the two functions will be drop in next version of patch.
>>
>> That's a shame!
>
>Need to comply with certain commercial terms.
>
>>
>>> >> +static int starfive_pmu_get_state(struct starfive_power_dev *pmd, bool *is_on)
>>> >> +{
>>> >> + struct starfive_pmu *pmu = pmd->power;
>>> >> +
>>> >> + if (!pmd->mask) {
>>> >> + *is_on = false;
>>> >> + return -EINVAL;
>>> >> + }
>>> >> +
>>> >> + *is_on = __raw_readl(pmu->base + CURR_POWER_MODE) & pmd->mask;
>>> >
>>> > Is there a specific reason that you are using the __raw variants here
>>> > (and elsewhere) in the driver?
>>>
>>> Will use unified function '__raw_readl' and '__raw_writel'
>>
>> No no, I want to know *why* you are using the __raw accessors here. My
>> understanding was that __raw variants are unbarriered & unordered with
>> respect to other io accesses.
>>
>> I do notice that the bcm driver you mentioned uses the __raw variants,
>> but only __raw variants - whereas you use readl() which is ordered and
>> barriered & __raw_readl().
>>
>> Is there a reason why you would not use readl() or readl_relaxed()?
>
>Your question led me to deeply understand the usage of these io accessors.
>__raw_readl / __raw_writel denotes native byte order, no memory barrier.
>readl / writel do guarantee the byte order with barrier, ensure that previous writes are done.
>Seem that non-raw accessors are more safe.
Yeah, if there's no good reason to use these "raw" versions then please use readl/readl_relaxed.
>> No worries, looking forward to getting my board :)
>>
>Have you purchased a VisionFive 2 board online?
I have :)
next prev parent reply other threads:[~2022-12-01 6:21 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-18 13:32 [PATCH v1 0/4] JH7110 Power Domain Support Walker Chen
2022-11-18 13:32 ` [PATCH v1 1/4] dt-bindings: power: Add StarFive JH7110 power domain definitions Walker Chen
2022-11-21 10:12 ` Krzysztof Kozlowski
2022-11-22 7:46 ` Walker Chen
2022-11-22 8:03 ` Krzysztof Kozlowski
2022-11-22 8:30 ` Walker Chen
2022-11-18 13:32 ` [PATCH v1 2/4] dt-bindings: power: Add starfive,jh71xx-power bindings Walker Chen
2022-11-21 10:13 ` Krzysztof Kozlowski
2022-11-22 13:22 ` Walker Chen
2022-11-30 15:24 ` Rob Herring
2022-12-01 5:51 ` Walker Chen
2022-11-18 13:32 ` [PATCH v1 3/4] soc: starfive: Add StarFive JH71XX pmu driver Walker Chen
2022-11-18 18:31 ` Emil Renner Berthing
2022-11-24 9:08 ` Walker Chen
2022-11-24 9:28 ` Conor Dooley
2022-11-24 9:44 ` Walker Chen
2022-11-18 19:36 ` Conor Dooley
2022-11-25 2:40 ` Walker Chen
2022-11-19 0:24 ` Conor Dooley
2022-11-25 10:04 ` Walker Chen
2022-11-25 11:17 ` Conor Dooley
2022-12-01 3:56 ` Walker Chen
2022-12-01 6:21 ` Conor Dooley [this message]
2022-11-21 10:14 ` Krzysztof Kozlowski
2022-11-28 3:09 ` Walker Chen
2022-11-22 0:09 ` Kevin Hilman
2022-11-30 7:54 ` Walker Chen
2022-11-18 13:32 ` [PATCH v1 4/4] riscv: dts: starfive: add power controller node Walker Chen
2022-11-18 18:36 ` Emil Renner Berthing
2022-11-23 2:11 ` Walker Chen
2022-11-30 14:38 ` Emil Renner Berthing
2022-11-18 18:38 ` [PATCH v1 0/4] JH7110 Power Domain Support Emil Renner Berthing
2022-11-24 9:18 ` Walker Chen
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=42D09618-DB39-4A8B-9327-4C6CC9DA2000@kernel.org \
--to=conor@kernel.org \
--cc=conor.dooley@microchip.com \
--cc=devicetree@vger.kernel.org \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pm@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=rafael@kernel.org \
--cc=robh+dt@kernel.org \
--cc=walker.chen@starfivetech.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).