From: "Clément Le Goffic" <legoffic.clement@gmail.com>
To: Julius Werner <jwerner@chromium.org>
Cc: "Krzysztof Kozlowski" <krzk@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Maxime Coquelin" <mcoquelin.stm32@gmail.com>,
"Alexandre Torgue" <alexandre.torgue@foss.st.com>,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org,
"Clément Le Goffic" <clement.legoffic@foss.st.com>
Subject: Re: [PATCH v7 2/7] dt-bindings: memory: introduce DDR4
Date: Wed, 24 Sep 2025 12:00:17 +0200 [thread overview]
Message-ID: <430e9fad-a877-4328-848f-59b982a10706@gmail.com> (raw)
In-Reply-To: <CAODwPW9Js2AjSzQrvRFMK3xHXjbb6qV2bGEj3GhYWpDELniyCQ@mail.gmail.com>
On 23/09/2025 00:51, Julius Werner wrote:
>> + - pattern: "^ddr4-[0-9a-f]{4},[a-z]{1,10},[0-9a-f]{2}$"
>
> I don't really understand why there can only be up to 10 characters in
> the module part number. I also don't understand why you wrote "20
> bytes (10 chars)" for this in the previous patch. Are you assuming
> that module part numbers are UTF16LE? According to my reading of the
> spec, it sounds like they're supposed to be plain ASCII, i.e. 20 bytes
> should be able to contain up to 20 chars.
Hi Julius,
Yes plain ASCII needs 8 bits for each char as the value range is 0-127
I was having hexadecimal in mind while writing this, I'm sorry.
I'll fix it here and in the previous patch.
Best regards,
Clément
next prev parent reply other threads:[~2025-09-24 10:00 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-22 10:06 [PATCH v7 0/7] Add DDR4 memory-controller bindings and factorise LPDDR and DDR bindings Clément Le Goffic
2025-09-22 10:06 ` [PATCH v7 1/7] dt-bindings: memory: factorise LPDDR props into SDRAM props Clément Le Goffic
2025-09-22 22:45 ` Julius Werner
2025-09-24 9:42 ` Clément Le Goffic
2025-09-22 10:06 ` [PATCH v7 2/7] dt-bindings: memory: introduce DDR4 Clément Le Goffic
2025-09-22 22:51 ` Julius Werner
2025-09-24 10:00 ` Clément Le Goffic [this message]
2025-09-22 10:06 ` [PATCH v7 3/7] dt-bindings: memory: factorise LPDDR channel binding into SDRAM channel Clément Le Goffic
2025-09-22 10:06 ` [PATCH v7 4/7] dt-binding: memory: add DDR4 channel compatible Clément Le Goffic
2025-09-22 10:06 ` [PATCH v7 5/7] dt-bindings: memory: SDRAM channel: standardise node name Clément Le Goffic
2025-09-22 10:06 ` [PATCH v7 6/7] arm64: dts: st: add LPDDR channel to stm32mp257f-dk board Clément Le Goffic
2025-09-22 10:06 ` [PATCH v7 7/7] arm64: dts: st: add DDR channel to stm32mp257f-ev1 board Clément Le Goffic
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