RE: [PATCH] of/fdt: Add unflatten_partial_device_tree

[Stephen Neuendorffer <stephen.neuendorffer-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>]

> -----Original Message-----
> From:
devicetree-discuss-bounces+stephen.neuendorffer=xilinx.com-uLR06cmDAlaKREJ1Ck/qmQ@public.gmane.org
org [mailto:devicetree-
> discuss-bounces+stephen.neuendorffer=xilinx.com-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org] On
Behalf Of M. Warner Losh
> Sent: Tuesday, June 29, 2010 9:25 AM
> To: glikely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org
> Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
> Subject: Re: [PATCH] of/fdt: Add unflatten_partial_device_tree
> 
> In message: <cf16ff7b-9208-4f47-8cea-ed8a8e52d30e-2ueSQiBKiTY7tOexoI0I+QC/G2K4zDHf@public.gmane.org>
>             Grant Likely <glikely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org> writes:
> :
> : >> Another question is what to do with the unflattened tree once it
is
> : >> unflattened.  Some of the existing code expects the node to be
part of
> : >> the global tree.  Those could either be refactored, or the new
partial
> : >> tree could be grafted into the global tree.  Grafting will have
the
> : >> least impact, but it probably isn't a good idea in the long term.
> : >> Grafting together unrelated trees seems messy to me.
> : >
> : >I think I must have missed an earlier discussion.  What's the use
case
> : >for multiple fdt blobs?
> :
> : FPGA on an add-on board in an x86 host.  Device tree fragment
> : describes the fpga design.  There could be multiple boards in a
> : system.
> 
> How do you imagine these fragments getting loaded into the system?

Not sure yet.  We also been working on partially reconfiguring the
FPGAs, too:

My current thought is that the 'base design' has a fixed FPGA structure
and a single
corresponding device tree: For convenience I've hardcoded this device
tree into
the pci device driver, although it should probably be separated out.
Independently,
the FPGA design may also have a 'reconfigurable' part, which can be
configured by
giving a (separate) device driver an FPGA bitstream and another device
tree description.
>From the 'parse a device tree' perspective, the problems are the same,
it's just a
matter of whether it is a device tree that describes hardware which is
relatively static
or relatively more dynamic.

Steve

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