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From: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
To: Konrad Dybcio <konrad.dybcio@linaro.org>,
	Andy Gross <agross@kernel.org>,
	Bjorn Andersson <andersson@kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Shawn Guo <shawn.guo@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>
Cc: Marijn Suijten <marijn.suijten@somainline.org>,
	linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org
Subject: Re: [PATCH v6 2/2] irqchip: irq-qcom-mpm: Support passing a slice of SRAM as reg space
Date: Sat, 25 Nov 2023 15:17:12 +0000	[thread overview]
Message-ID: <44a2b30a-7f8c-44a9-8a74-b09fee2b61b7@linaro.org> (raw)
In-Reply-To: <20230328-topic-msgram_mpm-v6-2-682e4855b7e2@linaro.org>

On 25/11/2023 14:27, Konrad Dybcio wrote:
> The MPM hardware is accessible to us from the ARM CPUs through a shared
> memory region (RPM MSG RAM) that's also concurrently accessed by other
> kinds of cores on the system (like modem, ADSP etc.). Modeling this
> relation in a (somewhat) sane manner in the device tree basically
> requires us to either present the MPM as a child of said memory region
> (which makes little sense, as a mapped memory carveout is not a bus),
> define nodes which bleed their register spaces into one another, or
> passing their slice of the MSG RAM through some kind of a property.
> 
> Go with the third option and add a way to map a region passed through
> the "qcom,rpm-msg-ram" property as our register space.
> 
> The current way of using 'reg' is preserved for ABI reasons.
> 
> Acked-by: Shawn Guo <shawn.guo@linaro.org>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> ---
>   drivers/irqchip/irq-qcom-mpm.c | 21 ++++++++++++++++++---
>   1 file changed, 18 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/irqchip/irq-qcom-mpm.c b/drivers/irqchip/irq-qcom-mpm.c
> index 7124565234a5..7115e3056aa5 100644
> --- a/drivers/irqchip/irq-qcom-mpm.c
> +++ b/drivers/irqchip/irq-qcom-mpm.c
> @@ -14,6 +14,7 @@
>   #include <linux/mailbox_client.h>
>   #include <linux/module.h>
>   #include <linux/of.h>
> +#include <linux/of_address.h>
>   #include <linux/of_platform.h>
>   #include <linux/platform_device.h>
>   #include <linux/pm_domain.h>
> @@ -322,8 +323,10 @@ static int qcom_mpm_init(struct device_node *np, struct device_node *parent)
>   	struct device *dev = &pdev->dev;
>   	struct irq_domain *parent_domain;
>   	struct generic_pm_domain *genpd;
> +	struct device_node *msgram_np;
>   	struct qcom_mpm_priv *priv;
>   	unsigned int pin_cnt;
> +	struct resource res;
>   	int i, irq;
>   	int ret;
>   
> @@ -374,9 +377,21 @@ static int qcom_mpm_init(struct device_node *np, struct device_node *parent)
>   
>   	raw_spin_lock_init(&priv->lock);
>   
> -	priv->base = devm_platform_ioremap_resource(pdev, 0);
> -	if (IS_ERR(priv->base))
> -		return PTR_ERR(priv->base);
> +	/* If we have a handle to an RPM message ram partition, use it. */
> +	msgram_np = of_parse_phandle(np, "qcom,rpm-msg-ram", 0);
> +	if (msgram_np) {
> +		ret = of_address_to_resource(msgram_np, 0, &res);

You are capturing the return value but doing nothing with it.

One of

if (ret) {
     of_node_put(msgram_np);
     return ret;
}

or just drop the ret =

if you are sure of_address_to_resource() can never return an error for 
your use-case.

Once fixed.

Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>

  reply	other threads:[~2023-11-25 15:17 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-25 14:27 [PATCH v6 0/2] Resolve MPM register space situation Konrad Dybcio
2023-11-25 14:27 ` [PATCH v6 1/2] dt-bindings: interrupt-controller: mpm: Pass MSG RAM slice through phandle Konrad Dybcio
2023-11-25 14:27 ` [PATCH v6 2/2] irqchip: irq-qcom-mpm: Support passing a slice of SRAM as reg space Konrad Dybcio
2023-11-25 15:17   ` Bryan O'Donoghue [this message]
2023-11-25 15:41     ` Konrad Dybcio

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