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From: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
To: Jia Wang <wangjia@ultrarisc.com>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	 Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	 Jiri Slaby <jirislaby@kernel.org>,
	Paul Walmsley <pjw@kernel.org>,
	 Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	 Alexandre Ghiti <alex@ghiti.fr>, Rob Herring <robh@kernel.org>,
	 Krzysztof Kozlowski <krzk+dt@kernel.org>,
	 Conor Dooley <conor+dt@kernel.org>,
	LKML <linux-kernel@vger.kernel.org>,
	 linux-serial <linux-serial@vger.kernel.org>,
	 linux-riscv@lists.infradead.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v4 2/4] serial: 8250_dw: build Renesas RZN1 CPR value from DW_UART_CPR_* definitions
Date: Fri, 24 Apr 2026 14:38:56 +0300 (EEST)	[thread overview]
Message-ID: <4548483c-cbba-899e-6b1a-1290d36b59cd@linux.intel.com> (raw)
In-Reply-To: <20260424-ultrarisc-serial-v4-2-1765a0b4c4a0@ultrarisc.com>

On Fri, 24 Apr 2026, Jia Wang wrote:

> Replace the magic CPR value for Renesas RZ/N1 with a composition using
> DW_UART_CPR_* bit/field definitions and FIELD_PREP_CONST().
> 
> Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
> ---
>  drivers/tty/serial/8250/8250_dw.c | 10 +++++++++-
>  1 file changed, 9 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c
> index 467755bf0092..d3c2c9c84d9f 100644
> --- a/drivers/tty/serial/8250/8250_dw.c
> +++ b/drivers/tty/serial/8250/8250_dw.c
> @@ -937,7 +937,15 @@ static const struct dw8250_platform_data dw8250_armada_38x_data = {
>  
>  static const struct dw8250_platform_data dw8250_renesas_rzn1_data = {
>  	.usr_reg = DW_UART_USR,
> -	.cpr_value = 0x00012f32,
> +	.cpr_value = FIELD_PREP_CONST(DW_UART_CPR_ABP_DATA_WIDTH, 2) |
> +		     DW_UART_CPR_AFCE_MODE |
> +		     DW_UART_CPR_THRE_MODE |
> +		     DW_UART_CPR_ADDITIONAL_FEATURES |
> +		     DW_UART_CPR_FIFO_ACCESS |
> +		     DW_UART_CPR_FIFO_STAT |
> +		     DW_UART_CPR_SHADOW |
> +		     DW_UART_CPR_DMA_EXTRA |
> +		     FIELD_PREP_CONST(DW_UART_CPR_FIFO_MODE, 0x01),

Hmm, maybe there should also be macro also for this one which takes the 
fifosize as input and converts it to CPR field vlaue (effectively, the 
macro is an inverse of DW_UART_CPR_FIFO_SIZE()). It would be more readable 
than the literal.

Also include BUILD_BUG_ON(!IS_ALIGNED(fifosize, 16) + bounds checks) 
inside that macro to catch invalid fifo sizes (+ don't forget the 
necessary headers for those two new things).


-- 
 i.


  reply	other threads:[~2026-04-24 11:39 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-24  5:39 [PATCH v4 0/4] serial: 8250_dw: Add support for UltraRISC DP1000 UART Jia Wang
2026-04-24  5:39 ` [PATCH v4 1/4] serial: 8250_dwlib: move DesignWare register definitions to header Jia Wang
2026-04-24 10:02   ` Andy Shevchenko
2026-04-24  5:39 ` [PATCH v4 2/4] serial: 8250_dw: build Renesas RZN1 CPR value from DW_UART_CPR_* definitions Jia Wang
2026-04-24 11:38   ` Ilpo Järvinen [this message]
2026-04-24 13:27     ` Andy Shevchenko
2026-04-24 14:09       ` Ilpo Järvinen
2026-04-24 15:16         ` Andy Shevchenko
2026-04-24  5:39 ` [PATCH v4 3/4] dt-bindings: serial: snps-dw-apb-uart: Add UltraRISC DP1000 UART Jia Wang
2026-04-24  5:39 ` [PATCH v4 4/4] serial: 8250_dw: Use a fixed CPR value for " Jia Wang
2026-04-24  9:58 ` [PATCH v4 0/4] serial: 8250_dw: Add support " Andy Shevchenko

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