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Fri, 12 Apr 2024 00:52:34 -0700 (PDT) Received: from [192.168.1.20] ([178.197.223.16]) by smtp.gmail.com with ESMTPSA id xi3-20020a170906dac300b00a52228ce058sm1356123ejb.46.2024.04.12.00.52.32 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 12 Apr 2024 00:52:33 -0700 (PDT) Message-ID: <45534bbb-dc29-49bb-b36f-0f254d825fd9@linaro.org> Date: Fri, 12 Apr 2024 09:52:31 +0200 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/2] dt-bindings: phy: rockchip,pcie3-phy: add rockchip,rx-common-refclk-mode To: Niklas Cassel , Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner Cc: devicetree@vger.kernel.org, Sebastian Reichel , Michal Tomek , Damien Le Moal , Jon Lin , linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org References: <20240411130150.128107-1-cassel@kernel.org> <20240411130150.128107-2-cassel@kernel.org> Content-Language: en-US From: Krzysztof Kozlowski Autocrypt: addr=krzysztof.kozlowski@linaro.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 11/04/2024 15:01, Niklas Cassel wrote: > From the RK3588 Technical Reference Manual, Part1, > section 6.19 PCIe3PHY_GRF Register Description: > "rxX_cmn_refclk_mode" > RX common reference clock mode for lane X. This mode should be enabled > only when the far-end and near-end devices are running with a common > reference clock. > > The hardware reset value for this field is 0x1 (enabled). > Note that this register field is only available on RK3588, not on RK3568. > > The link training either fails or is highly unstable (link state will jump > continuously between L0 and recovery) when this mode is enabled while > using an endpoint running in Separate Reference Clock with No SSC (SRNS) > mode or Separate Reference Clock with SSC (SRIS) mode. > (Which is usually the case when using a real SoC as endpoint, e.g. the > RK3588 PCIe controller can run in both Root Complex and Endpoint mode.) > Acked-by: Krzysztof Kozlowski Best regards, Krzysztof