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Thu, 15 Oct 2026 03:22:13 -0700 (PDT) X-Received: by 2002:a05:620a:2855:b0:939:8148:1e3d with SMTP id af79cd13be357-93ebd0d7987mr3110391385a.2.1792059732804; Thu, 15 Oct 2026 03:22:12 -0700 (PDT) Received: from [192.168.226.26] ([178.235.128.140]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-c3ed6be6f15sm107592266b.10.2026.10.15.03.22.08 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 15 Oct 2026 03:22:11 -0700 (PDT) Message-ID: <456820f5-a5d5-4d7d-9cd2-5ebd67129b62@oss.qualcomm.com> Date: Thu, 15 Oct 2026 12:22:07 +0200 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 4/4] arm64: dts: qcom: nord: Fix videocc clock inputs To: Shawn Guo , Bjorn Andersson Cc: Abel Vesa , Stephen Boyd , Brian Masney , Jerome Brunet , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio , Taniya Das , Jagadeesh Kona , Bryan O'Donoghue , Bartosz Golaszewski , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20261008081036.3492003-1-shengchao.guo@oss.qualcomm.com> <20261008081036.3492003-5-shengchao.guo@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20261008081036.3492003-5-shengchao.guo@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Info: AW1haW4tMjYxMDE1MDA0MSBTYWx0ZWRfXyQ/cwsERyDLX rqLAMXMwG6/Q1YMj7kcpQaRruS38zORfsi8l2BPN8tD8X+rvBp16YB13V8N4VHpSsOgExARlx4T X2ZL9gQ7ksD7P03CVG/QFFubLCidcQI= X-Proofpoint-ORIG-GUID: Xlog41TVVCD7hdpHOKOcXwe-z5NKy0ju X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDE1MDA0MSBTYWx0ZWRfX1rtuxQgh0a8V rfCvQg/gWc09D6ksC+6VHdgJ1XX9NutpZMeTQGrKFvVRtLCVSKYWzJWjbuXBvgzR2w7+WpzBmys +LFDued6MXoSIrz07k8U8cMfUwzuu7gohtTUme0rqGMK4RCcBK18MhkTm81fZXwje0nnusNT6Pg NIdL568y5bgjERWE8obJU/IHZGll8GOdotRBa7C6pdnyVsDXMAdB53vGVjeHf4qMBCyZMxmReK9 qcfG9p3pFxlz7U3f11Ff3jCps+nrdv14VR4vcHX7oNpVQHqDFpg2naL9i2McL8jSiV65YsRo6Lc j3DkHIVmW7rQwPgm8PR6DPhw892zHJS8puNKv777/VD5Dkp9pAnaeLsc9t+e/o3RDmg6mzTKSli Aj4/qscT39oPXMZBj4Lzo6Ql0weKrTuTte6vXBl3UofMFWcUhgqW9MmY4nXbI6KoJedjcYvqLRt VeriZ13m5SimZoOuCVg== X-Authority-Analysis: v=2.4 cv=E8BYNqdl c=1 sm=1 tr=0 ts=6ad0a955 cx=c_pps a=7E5Bxpl4vBhpaufnMqZlrw==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=EUspDBNiAAAA:8 a=Z62H7OANAOBda0uacUIA:9 a=QEXdDO2ut3YA:10 a=pJ04lnu7RYOZP9TFuWaZ:22 X-Proofpoint-GUID: Xlog41TVVCD7hdpHOKOcXwe-z5NKy0ju X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-14_01,2026-10-14_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 impostorscore=0 suspectscore=0 malwarescore=0 spamscore=0 bulkscore=0 adultscore=0 priorityscore=1501 lowpriorityscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610080000 definitions=main-2610150041 On 10/8/26 10:10 AM, Shawn Guo wrote: > The video clock controller binding describes three clock inputs for > Nord: the board XO, the always-on board XO and the 32 kHz sleep clock. > The videocc node instead passes the board XO and NW_GCC_VIDEO_AHB_CLK, > which is not an input of the controller. > > Pass bi_tcxo_ao_div2 and the board sleep clock in place of the AHB > clock. No functional change, NW_GCC_VIDEO_AHB_CLK is kept always on by > the NW GCC driver. > > Assisted-by: LLM > Signed-off-by: Shawn Guo > --- again, with the commit message fixed: Reviewed-by: Konrad Dybcio Konrad