From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 503DF13A3F3; Mon, 26 Aug 2024 08:15:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724660119; cv=none; b=lMXLbvwLxlr/cZsSEM4P5ZAlgUTmuizI98nVzxtz451Sf69z3guqYVhtmpySNCoYHVEd5uh3qnJAfWSmZZ19Y89/ZCUsg4znP0u4XRSRmGkDfjup4e0WUu/unDAK/V6Jqmp7wIoTHFIK5T9wuvDp8O6lYEOAfpHuoSJHMJyV9DA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724660119; c=relaxed/simple; bh=mtt94lOze4hX1t8kQFcroSCkGOs+snsSQ3mu2Oel574=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=YxYfdLS0nl+AS91Xm/ObnilFYzqLWo2GvQHFh7bB7DwQGPLE5iPsAKxBJnPN1efaD1EHi2vZMt1gow5Oh03J358aetvGoU3mywcjMeLn3WrYoLCNuS6ASubmIcFIPze6IaDUvGsOw1Rf/1I8sA06FXkt5X5lXQ8QE8OX0T4osQE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=qSOXYHJg; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="qSOXYHJg" Received: by smtp.kernel.org (Postfix) with ESMTPSA id D0A02C8CDD2; Mon, 26 Aug 2024 08:15:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1724660118; bh=mtt94lOze4hX1t8kQFcroSCkGOs+snsSQ3mu2Oel574=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=qSOXYHJg7CFbIPoMoq4oSQgV7+NK5BHIw2lcOXp8xzXHulN7LOyfu+gl2Ie4sjxDs YvYJ24wEcNhBzHYNEhfHovrhW3Cyb8ftM0PA+KmhCwWAcwfp5xygTjy73/q2c8Kgk/ uGvHFXNtBmWAkaFmPgSWhM4sQvSrZrleaZrD4ipFBlGWbymb3EhfjIs7fz/S2k46x2 mGSAeMPrwMQiEKt6JYcpfJtleIwnCRICY8wi/1a6P6+9Xu1+PtlXphqxtpmc0GXmmH l8SywurQ2u5tKmoDzFVyAoQiy8wFrR0zazrAh4kwtokoMz/MuFVCR68Bknugv6kwlL m+lLjUgmn8Xdw== Message-ID: <45e1533a-5f97-4262-b6ae-477f1f94aa8b@kernel.org> Date: Mon, 26 Aug 2024 10:15:06 +0200 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 3/4] dt-bindings: display: ti,am65x-dss: Add OLDI properties for AM625 DSS To: Aradhya Bhatia , Tomi Valkeinen , Jyri Sarha , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Laurent Pinchart , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: DRI Development List , Devicetree List , Linux Kernel List , Nishanth Menon , Vignesh Raghavendra , Praneeth Bajjuri , Udit Kumar , Francesco Dolcini , Alexander Sverdlin , Randolph Sapp , Devarsh Thakkar , Jayesh Choudhary , Jai Luthra References: <20240716084248.1393666-1-a-bhatia1@ti.com> <20240716084248.1393666-4-a-bhatia1@ti.com> <93844c97-46b7-48bd-9397-2bbba9c09510@kernel.org> <73f033cb-d890-426d-8b1a-f9c56456961d@linux.dev> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 26/08/2024 09:32, Aradhya Bhatia wrote: > Hi Krzysztof, > > > On 7/21/24 21:09, Krzysztof Kozlowski wrote: >> On 16/07/2024 10:42, Aradhya Bhatia wrote: >>> The DSS in AM625 SoC has 2 OLDI TXes. Refer the OLDI schema to add the >>> support for the OLDI TXes. >>> >>> The AM625 DSS VP1 (port@0) can connect and control 2 OLDI TXes, to use >>> them in dual-link or cloned single-link OLDI modes. Add support for an >>> additional endpoint under the port@0 to accurately depict the data flow >>> path. >>> >>> Signed-off-by: Aradhya Bhatia >>> --- >>> .../bindings/display/ti/ti,am65x-dss.yaml | 135 ++++++++++++++++++ >>> 1 file changed, 135 insertions(+) >>> >>> diff --git a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml >>> index 399d68986326..249597455d34 100644 >>> --- a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml >>> +++ b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml >>> @@ -91,6 +91,24 @@ properties: >>> For AM625 DSS, the internal DPI output port node from video >>> port 1. >>> For AM62A7 DSS, the port is tied off inside the SoC. >>> + properties: >>> + endpoint@0: >>> + $ref: /schemas/graph.yaml#/properties/endpoint >>> + description: >>> + For AM625 DSS, VP Connection to OLDI0. >>> + For AM65X DSS, OLDI output from the SoC. >>> + >>> + endpoint@1: >>> + $ref: /schemas/graph.yaml#/properties/endpoint >>> + description: >>> + For AM625 DSS, VP Connection to OLDI1. >> >> Eh, that's confusing. Why do you have graph to your children? Isn't this >> entirely pointless? > > I am not sure I fully understand. The same display source video port can > connect up to 2 OLDI TXes - hence 2 endpoints which connect to the OLDI > that were described in the previous patch. The idea has been to > accurately depict the connections of the hardware. > > What am I missing here? You are missing the explanation: why do you need to represent internal parts of a device with graph. Where does this endpoint point? Provide some diagram showing the architecture, because either it is wrong or I do not understand what hardware you want to represent here. > > > side-note: I do realize, as I write this, that it has been quite a while > since you reviewed, and that you may have, rightfully, lost context. > I apologize for that. > >> >>> + >>> + anyOf: >>> + - required: >>> + - endpoint >>> + - required: >>> + - endpoint@0 >>> + - endpoint@1 >>> >>> port@1: >>> $ref: /schemas/graph.yaml#/properties/port >>> @@ -112,6 +130,23 @@ properties: >>> Input memory (from main memory to dispc) bandwidth limit in >>> bytes per second >>> >>> + oldi-txes: >>> + type: object >>> + additionalProperties: true >> >> Why? This looks wrong. > > This, I will admit, was a shot in the dark. The binding check asked me > that I was missing either this or unevaluatedProperties. I tried to make > sense of the two, but with little luck. Eventually, I went with this. > > I could change it to unevaluatedProperties if that is indeed correct. I > could also use some comprehensive resource to understand this, if you > have something to recommend. =) This must be additionalProperties false. See example schema or writing schema. Best regards, Krzysztof