[PATCH v11 0/7] Add dt-bindings and PHY updates for CAMSS on x1e80100 silicon

Bryan O'Donoghue
2026-03-26T01:28:03Z

Changes in v11:
- Dropped simple-mfd in dts for devm_of_platform_populate() - Krzysztof
- Pass polarity and position for data and clock lanes - bod
- Remove check for PHY_TYPE_DPHY - PHY driver validates its own mode - bod
- Depends-on: https://lore.kernel.org/r/20260325-dphy-params-extension-v1-0-c6df5599284a@linaro.org
- Depends-on: https://lore.kernel.org/r/20260326-x1e-csi2-phy-v5-0-0c0fc7f5c01b@linaro.org
- Link to v10: https://lore.kernel.org/r/20260316-b4-linux-next-25-03-13-dtsi-x1e80100-camss-v10-0-fdfe984fe941@linaro.org

Changes in v10:
- compat simple-mfd added to CAMSS allows probing sub-nodes.
The other way to do this would be simple-bus however, CAMSS
is really a collection of devices in a block as opposed to a
discoverable bus.
- csiphy nodes are sub-nodes of CAMSS.
Sub-nodes as pointed out by Dmitry will allow us to show some love to
older platforms.
- Depends-on: https://lore.kernel.org/r/20260315-x1e-csi2-phy-v4-0-90c09203888d@linaro.org
- Link to v9: https://lore.kernel.org/r/20260226-b4-linux-next-25-03-13-dtsi-x1e80100-camss-v9-0-a59c3f037d0b@linaro.org

v9:
- Adds phy handles as optional nodes
- Adds minItems: 5 for iommu entries
I believe this should be acceptable as maxItems: 8 continues
to be valid
- Makes CAMSS-level rails optional for x1e
Similarly I think this should be OK as the legacy binding
is still valid it is simply optional instead of mandatory now
- Supports CSIPHY nodes adjacent to CAMSS while leaving
csiphy regs intact.
- Pushes dtsi drop to another series everything in this series
can go through linux-media
- Depends-on: https://lore.kernel.org/r/20260226-x1e-csi2-phy-v3-0-11e608759410@linaro.org
- Link to v8: https://lore.kernel.org/r/20260225-b4-linux-next-25-03-13-dtsi-x1e80100-camss-v8-0-95517393bcb2@linaro.org

v8:

- This version rebases on latest media-committers/next - bod
- Adds support for "combo-mode" PHYs in the YAML.
It will be possible to build out the code to support this later - Vlad
- Maintains the upstream model of connecting sensors to CSI decoders.
Every other upstream implementation does it this way so
CAMSS will do it this way too.
- Reduces the number of IOMMU entires in CAMSS to those required for
CSID, VFE/RDI/PIX respectively.
Including all of the IOMMUs implies we will also "stuff" CAMSS
with ever increasing lists of registers but a better approach
is to have individual nodes for functional blocks.
For example this series supports CSIPHy as a separate block
CCI is already a separate block - and we will add ICP, BPS, IPE
etc as additional standalone nodes.
camss@someaddr {
//existing bindings vfe, csid, csiphy go here
iommus = <just what's needed for this>;
};
bps@some_other_address {
iommus = <bps specific iommus>;
}
In particular this model will save us from going down the same
path as the vpu which has ended up tripping over the total size
an iommu entry may span.

Nobody really likes the legacy binding much so instead of
continuing to bludgeon more entries into it, I've conciously
not included BPS, IPE, ICP etc.

Depends-on: https://lore.kernel.org/r/20260225-x1e-csi2-phy-v2-0-7756edb67ea9@linaro.org
Link to v7: https://lore.kernel.org/r/20250711-b4-linux-next-25-03-13-dtsi-x1e80100-camss-v7-0-0bc5da82f526@linaro.org
Working tree: https://gitlab.com/Linaro/arm64-laptops/linux/-/tree/qcom-laptops-v6.19-rc8-camss?ref_type=heads

v7:

- Reimagine the PHYs as individual nodes.
A v1 of the schmea and driver for the CSI PHY has been published with
some review feedback from Rob Herring and Konrad Dybcio

https://lore.kernel.org/r/20250710-x1e-csi2-phy-v1-0-74acbb5b162b@linaro.org

Both the clock name changes from Rob and OPP changes suggested by Konrad
are _not_ yet present in this submission however stipulating to those
changes, I think publishing this v7 of the CAMSS/DT changes is warranted.

Its important to publish a whole view of changes for reviewers without
necessarily munging everything together in one sprawling series.

TL;DR I moved the PHY driver to its own series review comments there
are not reflected here yet but "shouldn't" have a big impact here.

- Having separate nodes in the DT for the PHYS allows for switching on PHYs
as we do for just about every other PHYs.
&csiphyX {
status = "okay";
};

We just list phys = <> in the core dtsi and enable the PHYs we want in
the platform dts.

- The level of code change in CAMSS itself turns out to be quite small.
Adding the PHY structure to the CSIPHY device
Differentiating the existing camss.c -> camss-csiphy.c init functions
A few new function pointers to facilitate parallel support of legacy
and new PHY interfaces.

- A key goal of this updated series is both to introduce a new PHY method
to CAMSS but to do it _only_ for a new SoC while taking care to ensure
that legacy CAMSS-PHY and legacy DT ABI continues to work.

This is a key point coming from the DT people which I've slowly imbibed
and hopefully succeeded in implementing.

- In addition to the CRD both T14s and Slim7x are supported.
I have the Inspirion14 working and the XPS but since we haven't landed
the Inspirion upstream yet, I've chosen to hold off on the XPS too.

- There is another proposal on the list to make PHY devices as sub-devices

I believe having those separate like most of our other PHYs
is the more appropriate way to go.

Similarly there is less code change to the CAMSS driver with this change.

Finally I believe we should contine to have endpoints go from the sensor
to CAMSS not the PHY as CAMSS' CSI decoder is the consumer of the data
not the PHY.

- Working tree: https://git.codelinaro.org/bryan.odonoghue/kernel/-/tree/x1e80100-6.16-rcX-dell-inspiron14-camss-ov02c10-ov02e10-audio-iris-phy-v3
- Link to v6: https://lore.kernel.org/r/20250314-b4-linux-next-25-03-13-dtsi-x1e80100-camss-v6-0-edcb2cfc3122@linaro.org

v6:
- Removes 'A phandle to an OPP node describing' per Krzysztof's comment
on patch #1
- Drops Fixes: from patch #1 - Krzysztof
- The ordering of opp description MXC and MMXC is kept as it matches the
power-domain ordering - Krzysztof/bod
- Link to v5: https://lore.kernel.org/r/20250313-b4-linux-next-25-03-13-dtsi-x1e80100-camss-v5-0-846c9a6493a8@linaro.org

v5:
- Picks up a Fixes: that is a valid precursor for this series - Vlad
- Applies RB from Vlad
- Drops "cam" prefix in interconnect names - Krzysztof/Vlad
- Amends sorting of regs, clocks consistent with recent 8550 - Depeng/Vlad
- Link to v4: https://lore.kernel.org/r/20250119-b4-linux-next-24-11-18-dtsi-x1e80100-camss-v4-0-c2964504131c@linaro.org

v4:
- Applies RB from Konrad
- Adds the second CCI I2C bus to CCI commit log description.
I previously considered leaving out the always on pins but, decided
to include them in the end and forgot to align the commit log.
- Alphabetises the camcc.h included in the dtsi. - Vlad
- Link to v3: https://lore.kernel.org/r/20250102-b4-linux-next-24-11-18-dtsi-x1e80100-camss-v3-0-cb66d55d20cc@linaro.org

v3:
- Fixes ordering of headers in dtsi - Vlad
- Changes camcc to always on - Vlad
- Applies RB as indicated - Krzysztof, Konrad
- Link to v2: https://lore.kernel.org/r/20241227-b4-linux-next-24-11-18-dtsi-x1e80100-camss-v2-0-06fdd5a7d5bb@linaro.org

v2:

I've gone through each comment and implemented each suggestion since IMO
they were all good/correct comments.

Detail:

- Moves x1e80100 camcc to its own yaml - Krzysztof
- csid_wrapper comes first because it is the most relevant
register set - configuring all CSID blocks subordinate to it - bod, Krzysztof
- Fixes missing commit log - Krz
- Updates to latest format established @ sc7280 - bod
- Includes CSID lite which I forgot to add @ v1 - Konrad, bod
- Replaces static ICC parameters with defines - Konrad
- Drops newlines between x and x-name - Konrad
- Drops redundant iommu extents - Konrad
- Leaves CAMERA_AHB_CLK as-is - Kronrad, Dmitry
Link: https://lore.kernel.org/r/3f1a960f-062e-4c29-ae7d-126192f35a8b@oss.qualcomm.com
- Interrupt EDGE_RISING - Vladimir
- Implements suggested regulator names pending refactor to PHY API - Vladimir
- Drop slow_ahb_src clock - Vladimir

Link to v1:
https://lore.kernel.org/r/20241119-b4-linux-next-24-11-18-dtsi-x1e80100-camss-v1-0-54075d75f654@linaro.org

Working tree:
https://git.codelinaro.org/bryan.odonoghue/kernel/-/tree/arm-laptop/wip/x1e80100-6.13-rc3

v1:

This series adds dt-bindings and dtsi for CAMSS on x1e80100.

The primary difference between x1e80100 and other platforms is a new VFE
and CSID pair at version 680.

Some minor driver churn will be required to support outside of the new VFE
and CSID blocks but nothing too major.

The CAMCC in this silicon requires two, not one power-domain requiring
either this fix I've proposed here or something similar:

https://lore.kernel.org/linux-arm-msm/bad60452-41b3-42fb-acba-5b7226226d2d@linaro.org/T/#t

That doesn't gate adoption of the binding description though.

A working tree in progress can be found here:
https://git.codelinaro.org/bryan.odonoghue/kernel/-/tree/x1e80100-6.12-rc7+camss?ref_type=heads

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
---
Bryan O'Donoghue (7):
dt-bindings: media: qcom,x1e80100-camss: Add optional PHY handle definitions
dt-bindings: media: qcom,x1e80100-camss: Add support for combo-mode endpoints
dt-bindings: media: qcom,x1e80100-camss: Describe iommu entries
media: qcom: camss: Add support to populate sub-devices
media: qcom: camss: Add legacy_phy flag to SoC definition structures
media: qcom: camss: Add support for PHY API devices
media: qcom: camss: Drop legacy PHY descriptions from x1e

.../bindings/media/qcom,x1e80100-camss.yaml | 128 ++++++++++++--
drivers/media/platform/qcom/camss/Kconfig | 1 +
drivers/media/platform/qcom/camss/camss-csiphy.c | 189 +++++++++++++++++++--
drivers/media/platform/qcom/camss/camss-csiphy.h | 7 +
drivers/media/platform/qcom/camss/camss.c | 127 ++++++++------
drivers/media/platform/qcom/camss/camss.h | 1 +
6 files changed, 374 insertions(+), 79 deletions(-)
---
base-commit: b11ac7d13db32d3a232e11b09491647179a2df5f
change-id: 20250313-b4-linux-next-25-03-13-dtsi-x1e80100-camss-1506f74bbd3a

Best regards,
--
Bryan O'Donoghue <bryan.odonoghue@linaro.org>