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Thu, 15 Oct 2026 20:15:25 -0700 (PDT) X-Received: by 2002:a05:693c:88d5:10b0:35e:5ca:e0df with SMTP id 5a478bee46e88-35e05cae713mr9104323eec.35.1792120524210; Thu, 15 Oct 2026 20:15:24 -0700 (PDT) Received: from [192.168.50.84] ([76.176.60.246]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-3608297f4f7sm2228750eec.23.2026.10.15.20.15.22 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 15 Oct 2026 20:15:23 -0700 (PDT) Message-ID: <46432502-b2a1-4e7e-b3d9-447a3e239fd5@oss.qualcomm.com> Date: Thu, 15 Oct 2026 20:15:21 -0700 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 5/7] arm64: dts: qcom: Add device tree for Lemans GearVM variant To: Shawn Guo , Bjorn Andersson Cc: Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Shazad Hussain , Nikunj Kela References: <20261015023711.721837-1-shengchao.guo@oss.qualcomm.com> <20261015023711.721837-6-shengchao.guo@oss.qualcomm.com> Content-Language: en-US From: Deepti Jaggi In-Reply-To: <20261015023711.721837-6-shengchao.guo@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: N9-FhJ4mjI9dle96phjUpPd9pscu1UPo X-Proofpoint-GUID: N9-FhJ4mjI9dle96phjUpPd9pscu1UPo X-Proofpoint-Spam-Info: AW1haW4tMjYxMDE2MDAxMiBTYWx0ZWRfX903sQ99Jn0Ty s9ScaEUYrxoMsMFnY5fKokyWlBPB20yTTVf8AJpqeacmevnje5Ive970y2qrjOi/3IbPmeoUu7C Gbts/5XqEFeMMN+CCK7Yt9SDLjEfh2k= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDE2MDAxMiBTYWx0ZWRfX2sMHJe+AHzVh 2QCh4YdUpbuVTQYADSYS343oou2wjhT2Nn9iKjlgyWDgK2INynLRRWAvOMO2SKLBcMMAen2fZi+ Pkt4MM7cpKjUvdbJTMzgmb83dC0TdUQxOZwk+Qrp8hc0HLv+PbNLGIgeE1pWSqDF0XE8qE1spc4 0es//kTHiSqTCM+wqwc2lBqso1AkSlDYWBu0q7JDXQ29gC3/C0RFFJIahoqf1v8w4bf+URT1a94 VtIaYw76F2CltyJzRzKWPMSBVxJfSvqgJwMB6ZRZf0rfzLOtgVpR7I6SKkjDT/3AMjYKyjsk5zb Qbi/0CRDAl0Id/4RohtenHELXf1o64C+tvCFC0i6OKXWJGfh4K7PBdBt1XVQ/dHGPHULPDJcsy3 8zrLI9mpfYEgy0G26sBcyU9XC62NAmusaVuDYPakanOvhW0KAN4ERGbi2NCULr7WlKXB5hAMn9v Qcv/QiVeJSC0DaQMVmg== X-Authority-Analysis: v=2.4 cv=Se1i5fRu c=1 sm=1 tr=0 ts=6ad196ce cx=c_pps a=cFYjgdjTJScbgFmBucgdfQ==:117 a=0ISbvMpsx/t7i6H15JfNAA==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22 a=KKAkSRfTAAAA:8 a=EUspDBNiAAAA:8 a=COk6AnOGAAAA:8 a=viPkIkau9hFIgBHGpf8A:9 a=QEXdDO2ut3YA:10 a=scEy_gLbYbu1JhEsrz4S:22 a=cvBusfyB2V15izCimMoJ:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-14_01,2026-10-14_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1011 adultscore=0 spamscore=0 malwarescore=0 priorityscore=1501 phishscore=0 bulkscore=0 suspectscore=0 lowpriorityscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610080000 definitions=main-2610160012 On 10/14/2026 7:37 PM, Shawn Guo wrote: > Add lemans-gearvm.dtsi for Lemans GearVM variant (SA8255P) that utilizes > firmware to configure platform resources such as clocks, interconnects > and TLMM. > Device drivers request these resources through the SCMI power, reset and > performance protocols. Assign each device driver a dedicated SCMI > channel and Tx/Rx doorbells to support parallel resource requests and > aggregation in the SCMI platform server. Operate the SCMI server stack > in an SMP-enabled VM using the Qualcomm SMC/HVC transport driver for > communication. > > Group resource operations to improve abstraction and reduce the number of > SCMI requests. Follow the SCMI-based resource management approach > demonstrated by Qualcomm at Linaro Connect 2024 [1]. > > [1] https://resources.linaro.org/en/resource/wfnfEwBhRjLV1PEAJoDDte > > Co-developed-by: Shazad Hussain > Signed-off-by: Shazad Hussain > Signed-off-by: Nikunj Kela > Co-developed-by: Deepti Jaggi > Signed-off-by: Deepti Jaggi > Signed-off-by: Shawn Guo > --- > arch/arm64/boot/dts/qcom/lemans-gearvm.dtsi | 3232 +++++++++++++++++++ > 1 file changed, 3232 insertions(+) > create mode 100644 arch/arm64/boot/dts/qcom/lemans-gearvm.dtsi > > diff --git a/arch/arm64/boot/dts/qcom/lemans-gearvm.dtsi b/arch/arm64/boot/dts/qcom/lemans-gearvm.dtsi > new file mode 100644 > index 000000000000..4c155cbc7975 > --- /dev/null > +++ b/arch/arm64/boot/dts/qcom/lemans-gearvm.dtsi > @@ -0,0 +1,3232 @@ > +// SPDX-License-Identifier: BSD-3-Clause > +/* > + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. > + */ > + > +#include "lemans.dtsi" > + > +/delete-node/ &xbl_boot_mem; > +/delete-node/ &pil_adsp_mem; > +/delete-node/ &q6_adsp_dtb_mem; > +/delete-node/ &q6_gdsp0_dtb_mem; > +/delete-node/ &pil_gdsp0_mem; > +/delete-node/ &pil_gdsp1_mem; > +/delete-node/ &q6_gdsp1_dtb_mem; > +/delete-node/ &q6_cdsp0_dtb_mem; > +/delete-node/ &pil_cdsp0_mem; > +/delete-node/ &pil_gpu_mem; > +/delete-node/ &q6_cdsp1_dtb_mem; > +/delete-node/ &pil_cdsp1_mem; > +/delete-node/ &pil_cvp_mem; > +/delete-node/ &pil_video_mem; > +/delete-node/ &scmi_mem; > +/delete-node/ &firmware_reserved_mem; > + > +/ { > + clocks { > + bi_tcxo_div2: bi-tcxo-div2-clk { > + compatible = "fixed-factor-clock"; > + clocks = <&xo_board_clk>; > + clock-mult = <1>; > + clock-div = <2>; > + #clock-cells = <0>; > + }; > + > + gpll0_board_clk: gpll0-board-clk { > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + }; > + > + sleep_clk: sleep-clk { > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + }; > + > + xo_board_clk: xo-board-clk { > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + }; > + }; > +}; > + > +&adreno_smmu { > + power-domains = <&scmi15_pd 0>; > +}; > + > +&cpufreq_hw { > + clocks = <&bi_tcxo_div2>, <&gpll0_board_clk>; > + clock-names = "xo", "alternate"; > +}; > + > +&firmware { > + scm { > + memory-region = <&tz_ffi_mem>; > + }; > + > + scmi0: scmi-0 { > + compatible = "qcom,scmi-smc"; > + arm,smc-id = <0xc6008012>; > + shmem = <&shmem0>; > + As bootloader updates the irq, we can add a comment here. > + interrupts = ; > + interrupt-names = "a2p"; > + > + #address-cells = <1>; > + #size-cells = <0>; > + > + arm,max-msg = <10>; > + arm,max-msg-size = <256>; > + arm,max-rx-timeout-ms = <3000>; > + > + status = "disabled"; > + > + scmi0_pd: protocol@11 { > + reg = <0x11>; > + #power-domain-cells = <1>; > + }; > + > + scmi0_dvfs: protocol@13 { > + reg = <0x13>; > + #power-domain-cells = <1>; > + }; > + > + scmi0_rst: protocol@16 { > + reg = <0x16>; > + #reset-cells = <1>; > + }; > + }; > + > + scmi1: scmi-1 { > + compatible = "qcom,scmi-smc"; > + arm,smc-id = <0xc6008012>; > + shmem = <&shmem1>; > + > + interrupts = ; > + interrupt-names = "a2p"; > + > + #address-cells = <1>; > + #size-cells = <0>; > + > + arm,max-msg = <10>; > + arm,max-msg-size = <256>; > + arm,max-rx-timeout-ms = <3000>; Thanks, Deepti