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[81.204.249.205]) by smtp.gmail.com with ESMTPSA id hw7-20020a170907a0c700b006f3ef214e18sm2336790ejc.126.2022.05.01.00.06.34 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 01 May 2022 00:06:35 -0700 (PDT) Message-ID: <46548c93-4e6d-858c-8b79-03be9326c92a@gmail.com> Date: Sun, 1 May 2022 09:06:33 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.8.0 Subject: Re: [PATCH v2 5/7] arm64: dts: rockchip: add Pine64 Quartz64-B device tree Content-Language: en-US To: Peter Geis , linux-rockchip@lists.infradead.org, Rob Herring , Krzysztof Kozlowski , Heiko Stuebner Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org References: <20220429115252.2360496-1-pgwipeout@gmail.com> <20220429115252.2360496-6-pgwipeout@gmail.com> From: Johan Jonker In-Reply-To: <20220429115252.2360496-6-pgwipeout@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 4/29/22 13:52, Peter Geis wrote: > Add a device tree for the Pine64 Quartz64 Model B single board computer. > This board ouputs debug on uart2 and supports the following components: > Gigabit Ethernet > USB2 x2 (one port otg capable) > USB3 > PCIe/SATA M2 > HDMI > DSI (RPi compatible pinout) > CSI (RPi compatible pinout) > A/B/G/N WiFi > Bluetooth > SDMMC > eMMC > SPI Flash > PI-40 compatible pin header > > Signed-off-by: Peter Geis > --- > arch/arm64/boot/dts/rockchip/Makefile | 1 + > .../boot/dts/rockchip/rk3566-quartz64-b.dts | 615 ++++++++++++++++++ > 2 files changed, 616 insertions(+) > create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts > > diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile > index 4ae9f35434b8..252ee47b8a1d 100644 > --- a/arch/arm64/boot/dts/rockchip/Makefile > +++ b/arch/arm64/boot/dts/rockchip/Makefile > @@ -59,5 +59,6 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-rock-pi-n10.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.1.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.2.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-a.dtb > +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-b.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-bpi-r2-pro.dtb > diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts > new file mode 100644 > index 000000000000..184ab7e1d178 > --- /dev/null > +++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts > @@ -0,0 +1,615 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * > + */ > + > +/dts-v1/; > + > +#include > +#include > +#include "rk3566.dtsi" > + > +/ { > + model = "Pine64 RK3566 Quartz64-B Board"; > + compatible = "pine64,quartz64-b", "rockchip,rk3566"; > + [..] > + > +&mdio1 { > + rgmii_phy1: ethernet-phy@0 { > + compatible = "ethernet-phy-ieee802.3-c22"; > + reg = <0x1>; Hi, The reg value doesn't match the node name. Other 2 boards use "reg = <0>" with label "rgmii_phy1". Could you check? Johan > + }; > +}; > +